Jobs / United States / Hewlett Packard Enterprise Company
Senior Principal Hardware Engineer
Hewlett Packard Enterprise Company · 🇺🇸 Sunnyvale, California, United States of America
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 167 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Hewlett Packard Enterprise Company paid sponsored hires in similar roles2 certified filings for “Electrical/Hardware Engineer II” (Computer Hardware Engineers) in CA: $137k–$208k, median $172k. Most were filed at wage level IV (100%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Hewlett Packard Enterprise Company
The US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 167 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Hewlett Packard Enterprise Company →
About the role
Senior Principal Hardware Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: We are seeking a highly motivated and experienced Senior Hardware Design Engineer to join our team and lead the design and development of next-generation networking hardware. The ideal candidate is a hands-on engineer with 10+ years of experience in complex hardware board design and a proven track record of taking designs from initial concept through production. This role requires deep expertise in high-speed signaling, high-power and extremely dense PCB designs, FPGA development, signal integrity analysis, thermal management using liquid cooling, and mechanical design/integration . The successful candidate will thrive in a fast-paced environment, demonstrate exceptional technical ownership, and work collaboratively across hardware, firmware, software, mechanical, thermal, and manufacturing teams. Key Responsibilities • Own the end-to-end hardware design lifecycle, from system architecture and concept development through schematic design, PCB layout, bring-up, validation, qualification, and production. • Lead the design of high-performance, high-density, high-power circuit boards with demanding electrical, thermal, and mechanical constraints. • Design systems incorporating high-speed serial signaling and interconnects at 100G, 200G, and beyond. • Develop and review complex schematics, power architectures, clocking solutions, high-speed interfaces, and board-level architectures. • Design and develop FPGA solutions as required, including FPGA selection, device configuration, interfaces, implementation, bring-up, and hardware/firmware integration. • Perform and/or drive Signal Integrity (SI) and Power Integrity (PI) analysis • Work on liquid-cooled scale-up system architectures, including high-bandwidth, high-performance interconnects and systems requiring significant compute, power, and bandwidth density. • Collaborate with thermal and mechanical engineering teams on liquid cooling architectures, cold plates, manifolds, flow paths, thermal interfaces, and system-level thermal solutions. • Identify technical risks early and develop practical solutions to ensure successful execution against aggressive schedules. Required Qualifications • 10+ years of hands-on hardware/board design experience with complex, high-performance electronic systems. 10+ years with the below experience as well: • Experience designing high-speed systems with 100G/200G-class signaling or comparable high-bandwidth interfaces. • Experience designing high-power, extremely dense PCBs and electronic systems. • Hands-on experience with FPGA design, including the ability to independently design and implement FPGA-based solutions when required. • Strong knowledge of Signal Integrity and Power Integrity (SI/PI) principles. • Experience with scale-up systems and high-performance computing, networking, AI/ML, accelerator, or similarly demanding architectures. • Experience with liquid cooling sys