SoC Functional Validation Engineer - Memory

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About the role

Job Details: Job Description: The Role and Impact As a Memory Pre-silicon Validation Engineer, you will play a key role in ensuring the quality and reliability of Intel’s next-generation platforms, including CPUs, chipsets, and boards. You will focus on pre-silicon validation debug, performing hands-on and characterization activities to identify issues, root-cause failures, and enabling IP functionality across firmware and software interactions. A major focus of this role is Memory technology bring-up, and advanced pre-silicon memory subsystem debug during new-generation CPU/SoC validation, covering Memory initialization, training optimization, frequency scaling, stability assessment, and power-management validation. Your contributions will directly impact Intel's ability to deliver high-quality products across server, desktop, and mobile market segments. Business Group The Functional Validation team belongs to Intel Corporation and is chartered to perform pre-silicon validation of cutting-edge Client AI PC SoCs and platforms. This team is dedicated to ensuring the functionality of SoC hardware features in real-world environments while supporting Intel’s broader goals of innovation and product excellence. With a strong focus on quality and reliability, the team is instrumental in driving Intel’s success in delivering reliable solutions to its global customers. Key Responsibilities • Perform pre-silicon validation and debug to ensure platform functionality aligns with design and architecture specifications. • Develop and enhance debug methodologies, debug flow, and AI debug frameworks to improve debug efficiency, quality, and productivity. • Conduct hands-on debug of IP, firmware, and software interaction issues, identifying and resolving failures across CPUs, chipsets, boards, and memory subsystems. • Drive Memory feature enablement and debug during new-generation CPU/SoC validation activities, including DDR5 and LPDDR5/LPDDR5X bring-up, MRC/BIOS analysis, memory initialization, training convergence, frequency scaling, and stability assessment. • Investigate and debug memory training algorithms, including read leveling, write leveling, read/write training, command/address training, power training, timing optimization, voltage margining, and signal integrity-related issues. • Analyze memory reference code, BIOS logs, training reports, margin data, eye diagrams, and memory matrix results to identify root causes and improve platform robustness. • Perform DDR memory characterization, margin validation, RMT analysis, failure pattern investigation, and memory subsystem tuning across different configurations and operating conditions. • Collaborate with architecture, design, firmware, BIOS, and silicon teams to resolve complex memory-related issues and improve validation effectiveness. • Debug tool capabilities including traces, cross-triggers, VISA, scan, and silicon observability features in pre-silicon and post-silicon environments. • Drive continuous improvement in validation and debug strategies, debug methodologies, and memory validation coverage. • Utilize hardware lab equipment such as logic analyzers, oscilloscopes, protocol analyzers, and memory debug tools to reproduce issues, collect data, and accelerate root-cause analysis. Qualifications: Minimum Qualifications   • Bachelor’s degree in a relevant field with 2 years of experience in Pre-silicon validation/design debugging, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training OR a Master’s degree in a relevant field with no prior professional experience.  • Fundamental knowledge of SoC platform architectures, PC architecture, and Pre-silicon setup. • Proficiency in scripting or programming for debugging purp

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