Senior Staff AMS Design Verification Engineer

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About the role

Senior project lead of a team of engineers in the tasks of guaranteeing specification compliance of analog & mixed signal design by means of advanced verification methodologies and concepts. It involves definition, deployment, and improvement of state-of-the-art verification methodologies. Principal Accountabilities: • Take responsibility for design verification to achieve first pass silicon success and to ensure design meets performance, power, and timescale constraints. • Lead analog & mixed signal verification of complex integrated circuits or sub-systems. • Provide a technical interface between AMS DV teams and any local contract DV resources. • Develop verification strategy for mixed signal IPs and implement the verification IP following object-oriented programming principles and methodologies including UVM. • Verification planning, maintenance, feature extraction, verification tests, coverage and checker development. • Develop efficient, reusable state-of-the-art verification environments and testbench structures. • Initiate and participate in review meetings with all functional disciplines such as analog & digital design teams, systems team, test & validation team, and other verification engineers. • Able to debug the RTL for design intent and interface with cross-functional teams and collaboration in all verification related activities. • Mentor verification team and provide technical support for verification activities. • Delegate project tasks appropriately, ensuring the entire team follows procedures and analog practices that are required by internal methodology guidelines. • Make significant contribution into Renesas's Analog verification strategy, through representation at group management meetings, customer reviews and cross-site initiatives. • Keep abreast of industry developments, driving continual improvements within team through effective change management. • Any ad hoc tasks as deemed reasonable by your manager.  Key Performance Measures: • Develop the technical and non-technical skillset of the team, ensuring clear career development and progression. Demonstrate effective performance management. • Ensure budget is appropriately managed and resource is utilized to maximize success of deliverables. • Ensure high quality deliverables in project through effective leadership and risk management. • Appropriate planning and delegation of tasks to ensure project timescales and quality expectations are met. • Ensure impactful dissemination of knowledge across teams. • Driving strategic changes within analog function that positively impact the business - e.g., resource, cost and performance. • Ensure effective team profiling, through succession planning, development, and strategic talent acquisition. • Demonstrate elements of Spirit of Renesas in all aspects of work • Instils culture of innovation, professionalism, and collaboration throughout team.  Qualifications • Degree level qualification in electrical engineering, electronics, computer engineering, computer science, or equivalent. • The ideal candidate has an experience of 10+ years in advanced verification methodologies, owning the verification of complex digital and mixed signal designs. • Strong fundamentals in analog and mixed signal circuit concepts and topologies. • Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virtuoso, xCelium, Incisive, vManager, IMC. • Ability to read analog schematics and extract related main functionality. • Familiar with Verilog based RTL coding and ASIC design methodology. • Expert in System Verilog for advanced verification methodologies such as assertions, constrained randomization, metric driven, and UVM. • Familiar with behavioral mod

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