Jobs / United States / Sk Hynix America INC

Assembly Design Kit (ADK) Engineer

Sk Hynix America INC · 🇺🇸 San Jose, CA

Sponsorship verdict

Sponsorship possible

One solid signal, not two — worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 6 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 2 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
  • What Sk Hynix America INC paid sponsored hires in similar roles1 certified filing for “Sr. Staff Engineer, Analog/Mixed-Signal Circuit Design” (Electronics Engineers, Except Computer) in CA: $200k–$200k, median $200k. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
  • Confirmed live todayWhen a source last listed this job as open.

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.

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Sponsor Radar — Sk Hynix America INC

6 H-1B filings certified since Oct 2025

The US Department of Labor certified 6 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 2 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).

Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Sk Hynix America INC →

About the role

About SK hynix America: At SK hynix America, we are at the forefront of semiconductor innovation. As a global leader in HBM, DRAM, and NAND flash technologies, we develop the advanced memory solutions powering everything from advanced mobile technology to massive AI data centers. With major investments in the U.S. and a leading position in the global AI revolution, we build the critical infrastructure of the digital landscape and remain committed to sustainable operations. We invite innovative minds to be part of our journey. Here, you will be part of a collaborative team pioneering the next generation of memory technologies, expanding our market footprint, and defining the future of computing. Work Model: Onsite Job Overview: SK hynix America is seeking a highly experienced and motivated ADK (Assembly Design Kit) engineer to join our Advanced Packaging R&D team. In this critical role, you will be at the forefront of semiconductor innovation, leading the development of robust design rules and verification flows for our next-generation 2.5D/3D Interposer and Heterogeneous Integration technologies. You will serve as the vital bridge between package architecture, process integration, and design implementation. Your primary responsibility will be defining the Design Rules, DRC (Design Rule Check), and LVS (Layout vs. Schematic) frameworks that ensure our advanced designs are manufactural, reliable, and high-yielding. The ideal candidate possesses deep expertise in Physical Verification (PV), a comprehensive understanding of semiconductor packaging processes (specifically TSV, Micro-bump, bridge die and RDL), and the strategic ability to translate complex process constraints into design rules. Furthermore, you will play a key role in optimizing the overall design-to-signoff flow, ensuring seamless integration across multidisciplinary teams. Responsibilities: • ADK Development & Maintenance: Lead the creation and maintenance of comprehensive Assembly Design Kits (ADK) tailored for advanced packaging technologies (2.5D/3D IC, SiP, Fan-Out). • Rule Definition & Verification: Define, debug, and validate Design Rules (DRC) and Layout vs. Schematic (LVS) checks, accounting for package-specific constraints such as bump placement, RDL routing, TSV integration, and wire bonding. • Cross-Functional Collaboration: Partner closely with package design, process integration, and manufacturing teams to ensure design rule accuracy, maximize yield, and accelerate time-to-market. • Physical Verification Support: Provide expert support to design teams in resolving complex physical verification issues arising from die-to-package integration and heterogeneous stacking. • Flow Automation & Optimization: Develop and automate verification flows using advanced scripting, integrating tools from Synopsys, Cadence, and Siemens EDA to enhance efficiency and data integrity. • Design Flow Strategy: Analyze and optimize the end-to-end package design flow, identifying bottlenecks and implementing best practices to streamline the journey from concept to GDSII sign-off. Qualifications: • Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field. • Experience: Minimum 3+ years of hands-on experience in Physical Design, CAD, or PDK/ADK development within the semiconductor or packaging industry. • Tool Proficiency: Extensive experience with industry-standard sign-off tools from multiple vendors such as Synopsys (IC Validator, 3DICC), Cadence (PVS, Virtuoso, Integrity 3D-IC), Siemens EDA (Calibre) • Technical Skills: Deep knowledge of design rule structures, verification methodologies, and GDSII/OASIS data formats. Preferred Qualifications: • Design Flow Expertise: Proven track record in managing physical design flows from

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Source: Greenhouse (employer board) First seen: 2026-10-16 Last confirmed: 2026-10-16 How our data works → Report this job

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