Jobs / United States / Intel Corporation

Intel Corporation

APTM Yield Analysis/Device Engineer

US, New Mexico, Albuquerque Posted today

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Skills this job asks for

Product managementStatisticsMachine learningPythonLeadership

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Intel Corporation paid sponsored hires in similar roles46 certified filings for “Process Engineer” (Materials Engineers) in NM: $96k–$96k, median $96k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Intel Corporation paid sponsored hires in similar roles
46 certified filings for “Process Engineer” (Materials Engineers) in NM: $96k–$96k, median $96k. Most were filed at wage level II (80%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Job Details: Job Description: At Intel, we create world-changing technology that improves the life of every person on the planet. By joining the Advanced Packaging Technology and Manufacturing (APTM) Yield Group, you will be part of a team tasked with the critical objective of driving yield and defect improvement across our entire advanced packaging portfolio. We solve highly complex physical and electrical problems to ensure our latest packaging technologies successfully transition from development into high-volume manufacturing.   We are seeking a APTM Yield Analysis/Device Engineer to drive technology development, transfers, and manufacturing ramps in Rio Rancho, New Mexico. In this role, you will analyze massive, multi-dimensional datasets to identify where manufacturing processes, test content, and inline metrologies must be optimized. Acting as a strategic technical advisor, you will set clear engineering priorities, lead cross-functional problem-solving initiatives, and directly influence our technology yield roadmap.   Key Responsibilities: • Data Synthesis & Insight Extraction: Extract insights from structured and unstructured factory datasets using statistical methods, machine learning, and tools like JMP or Python. • Failure Correlation: Correlate electrical and physical failure mechanisms by utilizing deep knowledge of Failure Analysis (FIFA), Design for Test (DFT), Sort/Test, and Integration/Process flows. • Defect System Optimization: Manage inline defect metrologies, evaluate detection capabilities, and drive inline defect reduction programs across the factory. • Technical Program Leadership: Lead a small group of engineers (direct or indirect) to execute experiments, resolve nonstandard yield events, and ensure smooth technology transfers to High-Volume Manufacturing (HVM). • Stakeholder Reporting & Collaboration: Deliver detailed technical reports summarizing yield and device health to upstream and downstream partners, establishing clear action plans to achieve best-in-class yield levels.   As a Successful Candidate, You Will Bring: • Leadership & Cross-Functional Influence: Instills a high-performing team culture with a willingness to lead, guide, and collaborate across diverse organizational boundaries. • Tolerance for Ambiguity & Flexibility: Adapts rapidly to changing priorities, new technical fields of study, and fluctuating business demands. • Strategic Prioritization & Autonomy: Works with minimal direct oversight to prioritize critical path items and resolve complex, unstructured technical issues. • Executive Communication: Delivers concise, high-impact technical presentations to influence decision-making among diverse groups at all levels.   Apply today to join Intel New Mexico's APTM Yield Group and lead the technical breakthroughs that power global computing. Let's build the future together. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research and relevant previous job and/or internship experience. Minimum Qualifications: • Bachelor's degree in Materials Science, Mechanical Engineering, Computer Science, Information Systems, Chemical Engineering, Electrical Engineering, Chemistry, Physics, or a related technical discipline with 5+ years of semiconductor industry experience. • OR Master's degree in a matching discipline with 3+ years of semiconductor industry experience. • OR PhD in a matching discipline with 1+ years of semiconductor industry experience.   Prefe

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