Principal Engineer, Package Integration and Manufacturability

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in an inclusive, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA is a fast-growing world leader supporting the most powerful supercomputers worldwide. Our networking products lead the industry and connect thousands of GPUs. We make outstanding artificial intelligence possible through innovative networking and computing integration. We value our people and seek excellent individuals to join us! We are looking for an experienced packaging, technology and manufacturability expert to help us build the next generation of networking products. Our networking devices depend heavily on advanced packaging methods like chiplet integration, 2.5D interposers, and co-packaged optics. Packaging choices influence schedule, cost, and yield equally with the silicon. We are looking for a packaging and manufacturability lead who will own the package technical view across our chip programs. This role partners with the advanced technology group to push technology limits in future products. Joining an outstanding team, you will highlight package risks early, bring manufacturability into design choices before they are fixed, and find co-design approaches that improve module yield. Join us in making an impact on all networking products and pushing the boundaries of technology. What you’ll be doing: • Lead the technical assessment of package risk across our chip programs — identifying failure modes in substrate, interposer and assembly integration before they reach silicon, quantifying their cost and schedule impact, and bringing them to program and technology reviews with a clear position • Drive new approaches to manufacturability across the board (package, substrate, interposer, silicon), spanning yield improvement, capacity and supply review, test strategy, thermal and assembly process maturity. Push co-design levers such as tolerance relaxation by design, testability before attach, design margins, and redundancy and partial-module recovery • Analyze module yield mechanics, reconcile predicted versus actual yield on units returning from assembly, and convert the findings into concrete design guidance • Evaluate emerging packaging and photonics technologies, including outside partner solutions, and define our product requirements — working closely with our advanced technology group What we need to see: • B.S or M.S. in Electrical Engineering, Mechanical Engineering, Materials Science or equivalent experience • More than 15 years of experience in package technology development or system integration, with multiple products carried through assembly • Deep understanding of 2.5D, chiplet and organic substrate integration. Working knowledge of assembly and module yield mechanics, including how alignment tolerance and process excursions drive assembly yield differently from defect density at the die level • Strong analytic capabilities, and passion for solving demanding technical problems • Ability to drive complex activities involving many interfaces and teams, and to hold a technical position across organizations Ways to stand out from the crowd: • Hands-on experience on an assembly floor, a foundry or at an OSAT •