Hardware Expert with Signal & Power Integrity

Develop electronic hardware for automotive HPC and chiplet platforms, with a primary focus on signal integrity and power integrity (SI/PI) simulation and analysis, complemented by electronic circuit design. Drive simulation-based decisions for high-speed interfaces, power delivery, and PCB/package integration, and deliver board designs from requirements through validation. Key Responsibilities: • Define SoC board specifications, select components, and develop schematics and verification criteria. • Design power, sequencing, clock/reset, and interfaces: PCIe Gen 3/4/5, LPDDR5, USB 3.x, SGMII/RGMII, and 10G Automotive Ethernet. • Review PCB placement, routing, fabrication readiness, power budgets, thermal margins, and reliability with development/manufacturing partners • Own SI/PI plans, budgets, and acceptance criteria; simulate DDR/LPDDR, PCIe, Ethernet, and SerDes before/after layout for loss, crosstalk, reflections, timing, jitter, eyes, and corner margins. • Build and validate PCB/package models using 2D/3D EM extraction, S-parameters, and IBIS/IBIS-AMI; assess model quality and limitations. • Analyze PDN IR-drop, current density, impedance, resonances, and transients; optimize power/ground structures and decoupling for rail-noise and impedance targets. • Derive PCB/package constraints for stack-ups, materials, impedance, routing, vias, return paths, and capacitors; support EMI/EMC simulation as needed. • Correlate simulations with oscilloscope, TDR, VNA, and rail measurements; resolve model, interconnect, PDN, and measurement discrepancies. • Lead SI/PI reviews and verified issue closure; maintain traceable reports, reusable flows, scripts, and guidelines • Customer document preparation (app note);   Qualifications • Bachelor’s in Electrical/Electronic Engineering or equivalent; • 8+ years in electronic hardware engineering, with substantial SI/PI simulation ownership guiding board/package design at least 3 years • SoC board design experience covering power, clock/reset, memory, and high-speed interfaces; • Proficiency in Cadence Allegro/OrCAD, Altium Designer, or Siemens EDA; DFM/DFT and EMI/EMC knowledge. • Schematic/layout review, bring-up, validation, and release experience using oscilloscopes, multimeters, and programmable supplies; BERT/VNA/TDR a plus. • Strong EM/transmission-line fundamentals: impedance, coupling, return paths, S-parameters, and time/frequency-domain analysis. • PDN modeling, IR-drop, impedance, decoupling, and transient analysis tied to rail/load requirements and margins. • SI/PI tool proficiency: Ansys SIwave/HFSS/Q3D, Cadence Sigrity/Clarity, HyperLynx, or Keysight ADS; circuit simulation and applicable IBIS/IBIS-AMI workflows. • DDR/LPDDR, PCIe, Ethernet, or SerDes analysis and measurement correlation; PCB stack-up, HDI, BGA escape, and package-parasitic knowledge. • Python/MATLAB automation and data analysis preferred; automotive HPC, chiplet/package-board co-design, and UCIe are advantages. Soft skills • Result oriented • Strong analytical and problem-solving mindset • Structured and quality-driven working approach • Ability to work effectively in cross-functional and global teams Good English communication (spoken & written) Further details regarding compensation and benefits will be shared during the interview process.