Skills this job asks for
LeadershipPythonTranslationCommunication
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Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 1 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest May 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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What Voyant Photonics INC paid sponsored hires in similar roles1 certified filing for “Senior Photonics Test Engineer” (Electrical Engineers) in NY: $115k–$115k, median $115k.
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Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 1 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest May 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Voyant Photonics INC paid sponsored hires in similar roles
- 1 certified filing for “Senior Photonics Test Engineer” (Electrical Engineers) in NY: $115k–$115k, median $115k. Most were filed at wage level II (100%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Principal PIC (Photonic Integrated Circuit) Design Engineer
About us:
Voyant Photonics builds silicon photonic chips that steer and switch light at high speed. They power next generation, chip-scale FMCW LiDAR for robotics and autonomy, and optical circuit switches (OCS) for AI data centers. Based in NYC, we’re a hands-on team designing, building, and deploying frontier hardware to solve problems that matter, from how machines see to how AI scales.
Why Join Us?
At Voyant, you'll help develop some of the most sophisticated silicon photonic chips, spanning two exciting applications: optical circuit switching for AI data centers and chip-scale LiDAR sensing.
You'll tackle engineering challenges at the intersection of photonic device physics, large-scale circuit integration, and semiconductor manufacturing, developing high-performance photonic components that enable PICs with hundreds to thousands of integrated optical devices.
As a Principal PIC Design Engineer, you'll take ownership of large scale photonic chip development from concept and simulation to layout, tapeout, and characterization. You'll have the opportunity to architect complex photonic integrated systems, define chip-level specifications and trade-offs, and work closely with a multidisciplinary team in a fast-paced startup environment.
The Role:
- Lead system-level architecture and design of large-scale silicon photonic integrated circuits (PICs), integrating hundreds to thousands of active and passive photonic devices.
- Define chip-level optical architectures, link budgets, and performance trade-offs across insertion loss, crosstalk, bandwidth, power consumption, and thermal management.
- Drive top-level chip integration, floorplanning, optical routing, and design-for-manufacturability (DFM) strategies for high-yield silicon photonics tapeouts.
- Contribute to photonic component library development
- Serve as top-level tapeout owner, managing design verification (DRC/LVS) and foundry tapeout execution
- Provide technical leadership across multidisciplinary teams, collaborating closely with component designers, packaging engineers, electronic IC (EIC) designers, and system software engineers.
- Guide wafer- and chip-level characterization strategies to evaluate full PIC performance against system-level requirements and drive iterative design updates.
- Establish and maintain technical relationships with foundry partners to evaluate next-generation process design kits (PDKs) and platform capabilities.
What We're Looking For
- Ph.D. in Electrical Engineering, Applied Physics, Photonics, or a related field with 5+ years of relevant industry experience.
- 7+ years of hands-on experience in silicon photonic integrated circuit (PIC) design, including electromagnetic simulation, active and passive component optimization, and top-level chip layout/floorplanning.
- Proven track record of taking complex silicon photonics designs through full foundry tapeouts (DRC/LVS) and successful silicon validation/characterization.
- Deep expertise in photonic device physics, optical waveguide theory, silicon and silicon nitride fabrication processes, and design-for-manufacturability (DFM) principles.
- Proficiency with industry-standard simulation and layout tools (e.g., Ansys Lumerical, Tidy3D, COMSOL, KLayout, and gdsfactory).
- Experience with optical characterization techniques, data analysis in Python or MATLAB, and translating lab measurements into PDK and circuit design updates.
- Strong technical leadership capability, excellent communication skills, and a demonstrated ability to collaborate across multidisciplinary teams (packaging, EIC, systems, and test).
Nice to Have
- Proven track record designing advanced silicon photonic switches, high
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