Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 123 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Samsung Semiconductor INC paid sponsored hires in similar roles1 certified filing for “Staff Engineer, Mechanical Simulation” (Mechanical Engineers) in CA: $159k–$159k, median $159k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 123 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Samsung Semiconductor INC paid sponsored hires in similar roles
- 1 certified filing for “Staff Engineer, Mechanical Simulation” (Mechanical Engineers) in CA: $159k–$159k, median $159k. Most were filed at wage level III (100%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Please Note:
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.
What You’ll Learn
• Project Overview: Every new generation of AI accelerator pushes more power through stacked memory, and temperature is now one of the limits on how fast and how dense HBM can be. Our lab builds compact thermal models that turn workload-driven power maps of a 3D-stacked HBM into transient temperature maps in minutes rather than the hours a full CFD run takes, while staying close to CFD accuracy. As an intern you will own one piece of this platform end to end: from the physics and the CFD reference to a validated model that architecture, power, and package teams use to make design decisions.
• Skills You’ll Learn:
• Heat conduction in 3D-stacked die: TSV arrays, micro-bumps, underfill, and anisotropic effective properties
• Compact and reduced-order thermal modeling
• CFD modeling and validation with Simcenter Flotherm
• Scientific computing at scale: sparse solvers, preconditioning, and fast Python/MATLAB code
• Power-thermal co-simulation and thermal-aware design of AI memory systems
What You’ll Do
Samsung’s Power & Thermal Lab is seeking a thermal engineering intern to help build and calibrate models of HBM stacks and package.
We are a small, fast ‑ moving team where direct ownership and minimal busywork empower every member to tackle the same real‑world problems. Working with authentic data, real partners, and production‑grade results, our contributions flow straight into platforms used across the company.
As an intern, the models you build feed design discussions for future HBM products. You will work on real projects with tangible results , receive mentorship, and help shape the scope of work in a collaborative environment where hardware, software, and thermal experts work side‑by‑side on next‑generation AI memory technologies.
Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy
Reports to: SVP, R&D (Power & Thermal Lab)
• Build and calibrate CFD models (Simcenter Flotherm) of HBM stacks and packages under realistic cooling conditions, and use them as the reference for fast models.
• Extend our compact thermal model to new stack heights, die configurations, and base-die power, and quantify its accuracy against CFD in both steady state and transient.
• Develop homogenization methods that replace fine features (TSV arrays, micro-bump layers, underfill) with effective properties, and establish where they hold and where they break.
• Speed up thermal solvers by orders of magnitude through model-order reduction, sparse linear algebra and preconditioning, GPU acceleration, or machine-learning surrogates.
• Run transient simulations driven by real AI workload traces, locate spatiotemporal hotspots, and explore thermal-aware policies such as throttling, refresh control, and power-map scheduling.
• Evaluate advanced cooling and thermal-interface options (cold plates, two-phase cooling, TIMs, backside cooling) and translate them into boundary conditions and desig
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