Junior Compute Architect

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world’s most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts.   The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. About the Hardware organisation at Fractile Processor Architecture sits within Fractile’s hardware organisation, which owns everything from compute engine definition and ISA design through memory hierarchies, on-chip interconnects, and the path from early architectural exploration through to tapeout and post-silicon validation. Architecture at Fractile isn’t a paper exercise — it’s built in constant collaboration with logical design, physical design, and verification teams, so that every architectural decision is grounded in what will actually perform in working silicon. About the team and role As an Early Career Processor Architect, you’ll join our architecture team to learn how to define the compute engines, ISA definitions and programming models that sit at the heart of our silicon. Working closely with senior architects and our logical design, physical design, and verification teams, you’ll get real exposure to performance modelling, specification writing, bottleneck analysis, and pre- and post-silicon validation — with experienced architects mentoring you as you build toward owning more of this yourself. About you We’re looking for someone with a strong foundational understanding of computer or processor architecture — built through coursework, personal projects, internships, placements, or research — who’s genuinely curious about performance and power trade-offs and eager to learn how to navigate them. You don’t need prior industry experience as a Processor Architect; what matters is real hands-on exposure to processor or accelerator design, through a final-year project, FPGA build, RISC-V implementation, internship, or research, plus a comfort working across disciplines and a track record of thriving in ambiguity and fast iteration. Key Requirements • A degree (BEng, MEng, MSc or equivalent) in Electronic Engineering, Computer Engineering, Computer Science, or a related field — or equivalent practical experience. • A solid foundational understanding of computer/processor architecture, including matrix- and vector-centric floating-point arithmetic and memory hierarchies, gained through study, projects, internships, or research. • Some exposure to RTL design concepts and how physical design constraints feed back into architectural choices — academic or internship-level experience is fine. • Any hands-on exposure to architectural performance modelling tools (gem5, SystemC, or custom cycle-accurate simulators), compiler/toolchain interactions, or AI acceleration/vector-matrix compute, through study or projects, is highly valued. • A clear communicator, comfortable working across architecture, mode