Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Hewlett Packard Enterprise Company paid sponsored hires in similar roles5 certified filings for “VLSI Engineer III” (Electronics Engineers, Except Computer) in CA: $157k–$186k, median $186k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Hewlett Packard Enterprise Company paid sponsored hires in similar roles
- 5 certified filings for “VLSI Engineer III” (Electronics Engineers, Except Computer) in CA: $157k–$186k, median $186k. Most were filed at wage level II (50%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
VLSI Physical Design Lead Engineer
This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
Job Family Definition:
Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Influences architecture and logic design and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. Will direct support personnel in the preparation of detailed design, design testing and prototype fabrication.
Management Level Definition:
Contributions have visible technical impact on a product or major subcomponent. Applies in-depth professional knowledge and innovative ideas to solve complex problems. Visible contributions improve time-to-market, achieve cost reductions, or satisfy current and future unmet customer needs. Recognized internal authority on key technology area applying innovative principles and ideas. Provides technical leadership for significant project/program work. Leads or participates in cross-functional initiatives and contributes to mentorship and knowledge sharing across the organization.
Responsibilities:
• Develops organization-wide architectures and methodologies for VLSI design and development across multiple platforms and organizations within the Global Business Unit.
• Recognized as an authority in key VLSI technical areas, Plays a crucial role in defining industry standards, developing product features that become accepted as de-facto industry standards
• Reviews and evaluates VLSI designs and project activities for compliance with technology and development guidelines and standards; Contributes towards decisions which have major technical impact on strategic directions and cost efficiency of the unit.
• Provides technical leadership and accountability for multiple project teams and engineers. Leverages recognized VLSI expertise, business acumen, and experience to influence decisions of executive business leadership, outsourced development partners, and industry standards groups.
• Provides guidance and mentoring to less experienced staff members to set multiple examples, over time, of VLSI design and development innovation and excellence.
• Participates in and provides input on process for selection of future technical leaders.
• Identifies emerging VLSI technologies and analyses their impact. Is instrumental in identifying new VLSI projects and programs.
Education and Experience Required:
• Bachelor's, Master's or PHD degree in Electrical Engineering, Computer engineering or equivalent
• Typically 10+ years experience.
Preferred Qualifications
• Experience navigating AI tools and methodologies to run design experiments, learn new information, and optimize flows.
• Publications, patents, or other demonstrated contributions in ASIC, VLSI, physical design, or electronic design auto
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