Jobs / United States / Intel Corporation

Intel Corporation

Senior System Validation and Integration Engineer

2 Locations Posted today

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Skills this job asks for

LeadershipCI/CDNetworkingPythonC++Machine learning

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Intel Corporation paid sponsored hires in similar roles287 certified filings for “Process Engineer” (Materials Engineers) in OR: $113k–$133k, median $133k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Intel Corporation paid sponsored hires in similar roles
287 certified filings for “Process Engineer” (Materials Engineers) in OR: $113k–$133k, median $133k. Most were filed at wage level III (87%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Job Details: Job Description: • Lead system validation and integration for Intel IPU (Infrastructure Processing Unit) silicon and presilicon projects, supporting one of the most innovative and leading product lines in the industry. • Drive deep understanding of system architecture and requirements; lead definition of comprehensive test plans in collaboration with system architects, design, and firmware teams. • Design, develop, and maintain advanced automation frameworks, system test plans, and validation procedures for both presilicon and silicon environments. • Take a handson leadership role in system bringup, feature enablement, integration, and crosscomponent debugging. • Own complex failure analysis and root cause investigation across hardware, firmware, and software layers. • Leverage AI and datadriven methodologies to accelerate debug, anomaly detection, log analysis, and test optimization; actively contribute to AIbased validation and development solutions. • Drive CI/CD methodologies in validation environments, improving coverage, scalability, and execution efficiency. • Mentor junior engineers, guide technical direction, and influence validation methodologies and best practices. • Work extensively with validation and lab tools such as Lauterbach, LeCroy, IXIA, and advanced debug infrastructures. Qualifications: • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. • 7+ years of experience in system validation for pre-silicon and silicon environments. • Strong experience in IP networking systems with deep understanding of protocols and performance (TCP/IP, routing, traffic flows). • Proven hands on expertise in debugging complex system issues across HW/SW/FW boundaries. • Strong programming skills in Python and/or C/C++, with experience building scalable automation frameworks. • Experience with networking and debug tools such as Wireshark, Scapy, Tcprewrite, NetCat, IPtables, etc. • Experience with AI/ML tools or techniques for debugging, log analysis, or test optimization - strong advantage. • Strong system level thinking, with multidisciplinary understanding (embedded systems, HW/SW interaction, architecture). • Proven experience leading test planning, estimation, and execution in complex projects. • Handson experience with CI/CD pipelines and automation in validation environments. • Strong leadership, mentoring, and cross team collaboration skills.            Job Type: Experienced Hire Shift: Shift 1 (Israel) Primary Location: Israel, Jerusalem Additional Locations: Israel, Haifa Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. *

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