Staff Package Design Engineer

In this role, you will work at the intersection of IC design, advanced package development, and system-level implementation. As a Staff-level contributor, you will serve as the technical focal point, guiding the architecture and physical design of next-generation, high-performance semiconductor packages, including 2.5D/3D heterogeneous integration, chiplet-based architectures, high-density interposers, and advanced substrate technologies. This role requires deep expertise in advanced packaging R&D, cross-domain co-design, and the ability to define methods and procedures for complex, multi-die integration assignments. You will lead cross-functional alignment with global silicon design, signal integrity/power integrity (SI/PI), thermal, and product engineering teams, while driving the creation of new packaging design rules and methodologies. Key Responsibilities • Physical Architecture Leadership: Lead package layout architecture and physical design for next-generation heterogeneous integration, including 2.5D/3D chiplet packaging, high-density interposers, bridge technologies (e.g., EMIB equivalents), RDL, and advanced FCBGA solutions. • Methodology & Design Rules: Define, establish, and optimize package design rules and assembly Best Known Methods (BKMs); partner with foundries, substrate vendors, and OSATs to evaluate and validate advanced packaging capabilities, DRCs, and manufacturing limits. • Cross-Functional Technical Focal Point: Act as the primary package architecture lead across SI/PI, thermal, tooling, and platform integration teams. Lead design reviews to establish project scope, align stakeholder requirements, and balance pin budgets against electrical and mechanical trade-offs. • Layout & Release Management: Manage the complex package design cycle—including footprint assignment, stack-up structures, high-speed escape routing, power/ground distribution, and generation of manufacturing release outputs (Gerber/drill data, bump maps, assembly drawings). • Mentorship: Provide technical mentorship and guidance to junior and intermediate package design engineers, establishing standardized CAD workflows, layout techniques, and technical training to drive consistent execution across the department. Experience • 8+ years of related experience with a Bachelor’s degree (or 6+ years with a Master’s degree); OR 5+ years of intensive R&D experience in advanced 2.5D/3D heterogeneous packaging (bridge/interposer architectures) with demonstrated experience establishing new design rules and authoring engineering BKMs. • Advanced Packaging Expertise: Strong background in advanced substrate-based packages, flip-chip layout, multi-die/chiplet-based architectures, thermal mitigation, and high-density routing. • CAD Proficiency: High proficiency with industry-standard package design tools, specifically Siemens/Mentor Xpedition (Layout / Substrate Integrator), Valor NPI, and/or Cadence Allegro Package Designer / SiP Layout. • Cross-Disciplinary Acumen: Working understanding of SI/PI fundamentals, impedance control, crosstalk mitigation, and the ability to balance these constraints against pin budgets and platform integration requirements. • Leadership & Communication: Strong communication and technical documentation skills, with a proven ability to lead multi-disciplinary test vehicle or product design meetings and secure tooling/supplier approvals independently. Education • Bachelor's or Master's degree in Mechanical Engineering, Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline. Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer th