Jobs / United States / General Motors Company
Electrical Hardware Test Engineer – MCU
General Motors Company · 🇺🇸 Warren, Michigan, United States of America
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 606 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 267 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What General Motors Company paid sponsored hires in similar roles60 certified filings for “Design Release Engineer” (Electrical Engineers) in MI: $132k–$155k, median $140k. Most were filed at wage level IV (81%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Last confirmed live 1 day agoWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
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Sponsor Radar — General Motors Company
The US Department of Labor certified 606 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 267 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for General Motors Company →
About the role
Job Description The Role General Motors is at the forefront of the transformation of automotive with the electrification of our portfolio and the development of leading-edge central compute, connectivity, and autonomous capabilities. Our Semiconductor Engineering team is a dynamic, high‑energy, and innovative group focused on design and commercialization of leading‑edge silicon enabling the future of GM’s Software Defined Vehicle (SDV) platforms – central compute units, connectivity modules, and other controllers. We are seeking a skilled and driven Hardware Test Engineer – MCU to join our Semiconductor Center of Excellence. This role will contribute to the definition, development, and execution of hardware test strategies for state‑of‑the‑art Microcontroller (MCU) solutions used in next‑generation automotive electronics platforms. You will be responsible for MCU and MCU‑centric ECU board bring‑up, test plan creation, automated test development, and systematic debug to ensure our silicon and hardware platforms meet functional, performance, and reliability goals from early samples through production. Responsibilities • Define end-to-end hardware test strategies and structured bring-up plans for MCUs and associated components (embedded flash, SRAM, external flash/DRAM where applicable, PMIC, transceivers, watchdog, oscillators) across EVKs, reference boards, and ECUs — including power-on sequencing, clock/reset validation, basic sanity, peripheral bring-up, regression suites, coverage goals, and clear pass/fail criteria. • Plan and execute MCU and board-level electrical characterization testing (for example voltage/current limits, static and dynamic power, leakage, sleep/wake current, timing margins, and I/O thresholds) across PVT corners and operating modes. • Design, implement, and maintain automated test frameworks and scripts (for example, Python, C/C++, or similar) to improve coverage, repeatability, and execution efficiency. • Develop test content and automation for key MCU subsystems and interfaces, such as CAN, LIN, Ethernet, SPI, I2C, UART, embedded flash & SRAM, ADC/DAC, PWM/timers, and HSM/security IP, including margin, and stress testing. • Use lab equipment (oscilloscopes, logic analyzers, protocol analyzers, power supplies, electronic loads, JTAG tools, etc.) to characterize signals, validate timing and margins, and root‑cause hardware issues. • Partner closely with MCU hardware design engineers, ECU hardware teams, and software teams to translate system requirements into concrete test cases and coverage metrics. • Develop and maintain reusable test procedures, documentation, and checklists that can be applied across multiple programs and platforms. • Support DV/PV and component environmental testing by defining hardware functional monitoring, lab setups, and diagnostics required to exercise MCU‑level functionality. • Provide technical mentorship and guidance to junior engineers on test methods, lab best practices, and debug techniques. Qualifications – Required • Bachelor’s degree in electrical engineering, computer engineering, or a related field. • 4+ years of experience in hardware validation or test engineering for complex digital systems, MCUs, or high‑integration ECUs. • Strong understanding of MCU subsystems and IP blocks (CPU cores including lockstep, embedded flash, peripherals, automotive networking, power management, and safety mechanisms) from a validation and debug perspective. • Proven hands‑on experience bringing up and testing complex digital boards, including power sequencing, clock/reset validation, and interface bring‑up. • Demonstrated experience creating and executing structured hardware test plans, including definition of objectives, coverage, pass/fail criteria, and traceabilit