Jobs / United States / Intel Corporation

Intel Corporation

Intel Mask Operations Module Development Engineer

US, Oregon, Hillsboro Posted today

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Intel Corporation paid sponsored hires in similar roles1 certified filing for “Operations Research Engineer” (Operations Research Analysts) in AZ: $94k–$94k, median $94k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Intel Corporation paid sponsored hires in similar roles
1 certified filing for “Operations Research Engineer” (Operations Research Analysts) in AZ: $94k–$94k, median $94k. Most were filed at wage level II (100%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.   Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.   Life at Intel: https://jobs.intel.com/en/life-at-intel   The Role and Impact : As a Module Development Engineer within Intel's Mask Operations team, you will play a critical role in the development and production of photolithography masks for advanced semiconductor manufacturing. Working onsite in a dynamic and collaborative environment, you will leverage your expertise to troubleshoot sophisticated manufacturing processes and equipment, optimize process stability, and drive innovation that supports Intel's cutting-edge silicon manufacturing solutions.   Business Group : Intel Mask Operations (IMO) is part of Intel's Logic Technology Development group, which is focused on pioneering advanced semiconductor technologies to deliver innovative manufacturing solutions. The team operates at the forefront of technology, ensuring the development and production of critical components that enable Intel's industry-leading products and position the company for continued growth in the semiconductor industry.   Responsibilities include but are not limited to: • Lead process equipment installation, development, and optimization. • Perform equipment maintenance, troubleshoot technical issues, and manage defect analysis and reduction activities. • Drive improvements in quality, reliability, yield, cost, productivity, and safety/ergonomics. • Plan and conduct experiments to fully characterize processes throughout development cycles. • Collaborate with cross-functional teams to resolve technical process and defect issues. • Establish control systems to optimize and sustain production performance. • Develop strategies to address complex problems and implement systems to prevent recurrence. • Stay updated on industry trends, contributing to roadmaps for future manufacturing technologies. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of relevant post-doc research and industry experience.   Minimum qualifications: • Candidate must possess a PhD degree in STEM related Science or Engineering fields • 5+ years of experience in advanced semiconductor or photomask manufacturing and process flow with strong hands-on equipment experience in process development and optimization.   Preferred qualifications: • Working knowledge of photolithography mask manufacturing and process technologies. • Proficiency in data analysis tools such as JMP or SQL. • Familiarity and experience with Statistical Process Control (SPC), Design of Experiments (DOE), and engineering analysis principles. • Experience photomask inspection, metrology and process equipment and in using scientific equipment, such as SEM or TEM, for materials and device characterization. • Advanced understanding of semiconductor processing fundamentals, such as lithography, etch, film deposition, and chemical-mechanical planarization. • Ability to construct clear, data-driven problem statements and solutions.   Join us in shaping the future of semiconductor technology through innovative engineering and cutting-edge advancements in man

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