Jobs / United States / Intel Corporation

Senior CPU RTL Design Engineer

Intel Corporation · 🇺🇸 2 Locations

Sponsorship verdict

Sponsorship possible

One solid signal, not two — worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
  • What Intel Corporation paid sponsored hires in similar roles211 certified filings for “Component Design Engineer” (Electronics Engineers, Except Computer) in CA: $125k–$167k, median $142k. Most were filed at wage level III (43%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
  • Confirmed live todayWhen a source last listed this job as open.

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.

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Sponsor Radar — Intel Corporation

1,731 H-1B filings certified since Oct 2025

The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).

Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Intel Corporation →

About the role

Job Details: Job Description: The Role and Impact As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL) code and simulation for the CPU, enabling creation of cell libraries, functional units, and CPU IP blocks for integration into full-chip designs. Your expertise will be pivotal in defining architecture and microarchitecture features, ensuring Intel continues to deliver innovative solutions that lead the industry in performance, energy efficiency, and design integrity. By contributing to the development and optimization of logic structures, you will help create technology that enriches the lives of every person on Earth, while enabling Intel to achieve its broader mission of engineering a brighter future. What You’ll Do Key responsibilities will include but not limited to: • Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU. • Participate in defining the architecture and microarchitecture features of the CPU design. • Write RTL and optimize logic for power, performance, area, and timing goals. • Ensure design integrity for physical implementation through effective strategies, tools, and methods. • Review verification plans to ensure design features are correctly validated and resolve failing RTL tests. • Document microarchitectural specifications (MAS) for the CPU features. • Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block. Successful Candidates Will Demonstrate • Strong ownership of complex technical deliverables and a commitment to delivering results. • Strong problem-solving and analytical skills with a data-driven approach. • Excellent collaboration skills across architecture, design, verification, and integration teams. Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.  •  See  Intel Benefits  for more details.  Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Note: For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information Minimum Qualification and Experience: • Bachelor's degree in electrical engineering, computer engineering, or computer science with 5+ years of relevant experience. Or a Master's degree in the same filed with 3+ years of experience. • 5+ years experience in CPU RTL design using  System Verilog, with strong knowledge of logic design, simulation, and debug. • 3+ years experience with modern energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization. • 3+ years experience in Cross-clock domain crossings and power aware design. • 3+ years experience in scripting languages such as TCL, Perl, or Python. Preferred Qualifications and Experience: • Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling. • Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language. • Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays. • Familiarity with circuit planning and timing convergence processes. • Ability to leverage broad understanding of CPU architecture to deliver impactful solutions. • Proficient with static timing analysis, UPF and li

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Source: Employer career site (Workday) First seen: 2026-10-01 Last confirmed: 2026-10-02 How our data works → Report this job

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