Jobs / United States / Intel Corporation
Design Verification Engineer
Intel Corporation · 🇺🇸 US, California, Santa Clara
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles211 certified filings for “Component Design Engineer” (Electronics Engineers, Except Computer) in CA: $125k–$167k, median $142k. Most were filed at wage level III (43%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Intel Corporation
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Intel Corporation →
About the role
Job Details: Job Description: About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification of next-generation interconnect and chassis IPs that underpin Intel's most ambitious SoC and platform products. Position Overview You will work alongside senior engineers to build testbenches, write constrained-random tests, close functional coverage, and root-cause simulation failures - developing end-to-end verification skills from day one. We look for engineers who think algorithmically, write clean code, and are excited to apply the latest AI-assisted development tools as a core part of how they work. You do not need to know everything on day one; you do need strong fundamentals, genuine curiosity, and the drive to ramp fast. Key Responsibilities • Develop testbench components, constrained-random stimulus, and functional checkers for interconnect and chassis IP under guidance of senior engineers • Write, run, and debug simulation tests; analyze failures and root-cause issues to closure with clear technical write-ups • Contribute to functional coverage plans, coverage closure analysis, and regression triage • Participate in spec reviews, design discussions, and bug triage; learn to contribute across architecture, design, and software boundaries • Use AI-assisted coding and debugging tools as an everyday part of development workflow; actively contribute to the team's productivity through automation and scripting • Continuously build depth in hardware design, verification methodology, and the chip development flow What We're Looking For You should demonstrate the following professional traits to be successful: • Genuine curiosity and the drive to ramp fast • Algorithmic thinking with a commitment to writing clean code • Enthusiasm for applying the latest AI-assisted development tools as a core part of how you work Qualifications: This position is not eligible for Intel immigration sponsorship. Minimum Qualifications • BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment • Foundation in logic design and digital circuits - required; ability to read and reason about RTL is essential • Demonstrated algorithmic thinking and software fundamentals application - required • Demonstrated proficiency in at least one of C/C++, Python, or SystemVerilog through coursework, projects, or internships • Coursework or project exposure to two or more of the following: computer architecture, parallel and distributed computing, operating systems, hardware/software interfaces, VLSI design • Demonstrated use of AI coding assistants as a regular part of coursework or project work - not occasional use, but as a genuine productivity tool Preferred Qualifications • Coursework or project work in hardware verification, FPGA design, or RTL simulation (ModelSim, VCS, Questa, or similar) • Exposure to SystemVerilog, UVM concepts, or assertion-based verification through coursework, self-study, or internship • Familiarity with standard bus protocols (AXI, AHB, PCIe) or cache/memory hierarchy concepts • Demonstrated project work (senior design, research, hackathon, personal) involving hardware modeling, algorithm implementation in HDL, or hardware-software co-design • Comfort working in Linux environments, using version control (git), and writing build/test automation scripts • Worked experience in any related field Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: Posting Statement: All qualified applicants will receive consideration for employme