Jobs / United States / Nvidia Corporation
Senior Cell Modeling and Verification Engineer
Nvidia Corporation · 🇺🇸 US, CA, Santa Clara
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 2,374 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 394 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Nvidia Corporation paid sponsored hires in similar roles69 certified filings for “Engineer Senior Verification” (Electronics Engineers, Except Computer) in TX: $161k–$184k, median $168k. Most were filed at wage level IV (79%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. The pay stated here (136,000 USD) is below what this employer usually pays sponsored hires for this role. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Nvidia Corporation
The US Department of Labor certified 2,374 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 394 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Nvidia Corporation →
About the role
Our work at NVIDIA is dedicated towards a computing model focused on visual and AI computing. For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics, with our invention of the GPU. The GPU has also shown to be spectacularly effective at solving some of the most complex problems in computer science. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world. We are looking to grow our company and teams with the smartest people in the world and there has never been a more exciting time to join our team! The NVIDIA VLSI team is looking for a Senior Cell Modeling and Verification Engineer with strong experience in hardware design and methodologies to help develop NVIDIA's ground breaking ASIC products and work hands on with new NVIDIA hardware to ensure it meets design, feature, and quality objectives. Our team is at the intersection of circuit design and digital design to help craft the most power-efficient and performance leading SoCs and GPUs to push the state of the art ASIC Verilog modelling. What you will be doing: • Work with sophisticated technologies and develop behavioral model and verification for custom mixed signal design cells that would be used on all the NVIDIA products. • Use Verilog, SystemVerilog, Perl, or Python and understanding of PLL and other high-speed interconnects to model, verify, emulate/prototype mixed-signal designs. • Collaborate with cross function teams with regards to library build, cell integration, ASIC verification and DFT simulation. • Document, implement, and deliver fully verified and high performance RTL to achieve design targets. What we need to see: • Bachelors or Masters in Electrical Engineering or Computer Engineering (or equivalent experience). • 3+ years of relevant experiences • Hands-on experience with RTL simulation and waveform debug. • Strong understanding of Verilog HDL. • Scripting experiences and skills using Python or Perl. • Knowledge of fundamental digital design and logic design concepts. Ways to stand out from the crowd: • Previous digital design experience is a plus. • Previous experience running simulations in Verilog. • Shown ability to collaborate with many groups and communicate technical details. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until October 10, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.