Jobs / United States / Hewlett Packard Enterprise Company

Senior Principal ASIC Design Engineer

Hewlett Packard Enterprise Company · 🇺🇸 Roseville, California, United States of America

Sponsorship verdict

Sponsorship possible

One solid signal, not two — worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 167 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
  • What Hewlett Packard Enterprise Company paid sponsored hires in similar roles1 certified filing for “Senior ASIC Verification Engineer” (Computer Hardware Engineers) in NC: $203k–$203k, median $203k. Most were filed at wage level IV (100%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
  • Confirmed live todayWhen a source last listed this job as open.

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.

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Sponsor Radar — Hewlett Packard Enterprise Company

486 H-1B filings certified since Oct 2025

The US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 167 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).

Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Hewlett Packard Enterprise Company →

About the role

Senior Principal ASIC Design Engineer    This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: HPE Networking is a leading provider of advanced routers and switches that keep the world connected with speed, reliability, security, and simplicity. Within the HPE Networking Silicon group, we push the boundaries of silicon innovation by building cutting-edge networking chips that power world-class routing and switching platforms. Bring your passion, creativity, and technical depth to a team where there are few boundaries to what you can accomplish. We operate with the agility of a start-up inside a global technology company, and year after year our team delivers some of the industry’s most powerful and highest-density networking silicon. As part of our fast-paced chip design organization, you will help define, design, and implement high-speed ASICs from product requirements and architecture through final netlist. You will work on complex, high-impact subsystems, collaborate with system design teams across geographies, and have significant opportunities to shape both product capability and engineering methodology. Our culture is built on open communication, empowerment, innovation, teamwork, and customer success. In this environment, you will have the opportunity to set ambitious goals, expand your technical leadership, and make a lasting contribution to high-performance networking products. Job Family Definition: Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions have substantial technical impact on a significant HPE product/project, or a strategic/architectural direction. Go-to creator and innovator for critical business challenges and opportunities. Substantial, unique contributions provide long-lasting, recurring benefits like time-to-market improvements, cost reductions, or satisfying future and current unmet customer needs. Recognized internal authority on key technology areas. Provides technical leadership to the business for significant project/program work. Leads and connects others across functions to unite around a common goal. Actively mentors others and contributes to the HPE technical community. Responsibilities: • Serve as the technical lead for a significant subsystem within a high-performance networking ASIC, defining the architecture from the ground up and translating product, hardware, and software requirements into a detailed and executable

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Source: Employer career site (Workday) First seen: 2026-10-13 Last confirmed: 2026-10-13 How our data works → Report this job

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