Jobs / United States / Waymo LLC
Senior Formal Verification Engineer
Waymo LLC · 🇺🇸 Mountain View, CA, USA
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 290 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 87 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Waymo LLC paid sponsored hires in similar roles182 certified filings for “Software Engineer” (Software Developers) in CA: $200k–$240k, median $205k. Most were filed at wage level II (66%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
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Sponsor Radar — Waymo LLC
The US Department of Labor certified 290 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 87 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Waymo LLC →
About the role
Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms. This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead. You will: • Define and drive formal strategy for first-pass silicon success. Own the formal verification sign-off approach across complex IP and SoC designs, utilizing advanced formal techniques (e.g., Bounded Model Checking, Datapath Validation, Connectivity, Sequential LEC, etc.) • Architect robust and scalable FV environments. Develop and deploy reusable formal testbenches, methodology flows, and high-coverage SVA assertion suites for systemic deployment across multiple design blocks and projects • Technical leadership & mentorship. Serve as the team's formal Subject Matter Expert, training and guiding logic designers and verification engineers to effectively incorporate formal methods into their workflows • Strategic planning and test plan execution. Collaborate with Architecture and Design teams to translate complex system and IP specifications into comprehensive formal verification test plans • Drive FV Infrastructure & Reporting. Maintain and enhance continuous integration, regression flows, and dashboarding to provide clear, actionable formal verification status and sign-off metrics to leadership • Advanced bug-hunting and debugging. Apply state-of-the-art formal techniques (e.g., assume-guarantee, abstractions, reductions) to tackle and efficiently decompose the most challenging, intractable verification problems You have: • BS/MS/PhD in CS/EE or related field, combined with 5+ years of hands-on formal verification experience on shipping silicon products • Deep, expert-level proficiency with at least one major commercial formal verification platform (e.g., Cadence JasperGold, Synopsys VC Formal, Mentor Questa Formal) • High level language proficiency in C++ and/or Python • Ability to model complex designs in SystemVerilog and advanced SystemVerilog Assertions, including writing complex cut-points and environment models for effective formal proof convergence • Proven track record in applying advanced formal debug techniques for problem decomposition (e.g., clock domain crossings, abstractions, assume-guarantee reasoning) • Excellent verbal and written communication skills with the ability to influence cross-functional teams (Design, Architecture, Software) and drive technical alignment We prefer: • Informed of latest developments in formal verification research and industry practice, identify opp