Jobs / United States / Western Digital Technologies INC
Principal RFIC Design Engineer
Western Digital Technologies INC · 🇺🇸 San Jose, CA, US
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 176 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 56 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Western Digital Technologies INC paid sponsored hires in similar roles28 certified filings for “Senior Engineer, Electronic Design Engineering” (Electronics Engineers, Except Computer) in CA: $117k–$161k, median $148k. Most were filed at wage level I (60%) — 1 lottery entry, ≈15% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Western Digital Technologies INC
The US Department of Labor certified 176 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 56 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Western Digital Technologies INC →
About the role
ESSENTIAL DUTIES AND RESPONSIBILITIES: • Designer will be responsible for the design of high performance analog and mixed-signal circuit blocks. • Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation. • Job responsibilities require ability to communicate at all levels and with cross functional groups. • Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept constructive criticism • Must have hands-on design and development experience in analog and mixed-signal integrated circuit • Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: • Amplifiers – operational, instrumentation, wide-bandwidth etc. • PMIC – Linear and switched regulators, Low-drop out regulators etc. • Data converters – ADC, DAC, Flash and SAR type • Must have experience in 40nm and below CMOS technology • Must have a demonstrable track record of successful design releases and mass production • Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.) • Experience with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization • Experience with floor planning, block level routing and top level chip routing • Knowledge of high performance and deep CMOS analog reliability considerations such as EM-IR, SOA and VDR and relevant mitigation techniques • Functional knowledge of logic digital circuits and understanding of basic digital design flow • Experience working with distributed design teams a plus • Must possess strong written and verbal communication skills • BSEE with minimum 10+ years of experience • MSEE with minimum 8+ years of experience • PhD with minimum 4+ years of experience WD is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the " Know Your Rights: Workplace Discrimination is Illegal ” poster. Our pay transparency policy is available here . WD thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusi