Jobs / United States / Samsung Semiconductor INC

Principal Engineer, Serdes Analog Design

Samsung Semiconductor INC · 🇺🇸 San Jose, California, United States

Sponsorship verdict

Sponsorship possible

One solid signal, not two — worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 123 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 52 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
  • What Samsung Semiconductor INC paid sponsored hires in similar roles45 certified filings for “Staff Engineer” (Electronics Engineers, Except Computer) in CA: $157k–$186k, median $169k. Most were filed at wage level III (43%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
  • Confirmed live todayWhen a source last listed this job as open.

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.

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Sponsor Radar — Samsung Semiconductor INC

123 H-1B filings certified since Oct 2025

The US Department of Labor certified 123 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 52 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).

Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Samsung Semiconductor INC →

About the role

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. We power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more with our technology solutions. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe that innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. Advanced Circuit and Systems (ACAS) is looking for a Principal Engineer, Serdes Analog Design. In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver (Serdes). You will help define circuits and architecture for Serdes IPs, clock generation as well as traditional analog circuits. You’ll supervise designers to deliver the complete design and to support silicon validation and debugging. You’ll work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies. Location: Onsite at our San Jose office 5 days a week What You’ll Do • Define architecture and circuits for serdes projects. • Supervise designers to complete the project and to conduct silicon validation. • Hands-on circuit design experience is a must. • Familiarity with low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies • Translate component design specification to schematics. Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability. • Supervise layout of the complete project. Optimize layout to improve the power consumption and performance of circuits What You Bring • Bachelors with 20+ years, Masters with 18+ years or PhDs with 15+ years of experience. • Minimum 7+ yrs experience in Analog/Serdes SoC design experience. • Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters. • Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation. • Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe) • Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus. • Well-versed in EDA tools (Cadence, Spectre, Tote

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Source: Greenhouse (employer board) First seen: 2026-10-15 Last confirmed: 2026-10-15 How our data works → Report this job

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