Jobs / United States / Sambanova Systems INC
Design Verification Engineer
Sambanova Systems INC · 🇺🇸 San Jose, California, United States
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 23 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 4 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Sambanova Systems INC paid sponsored hires in similar roles8 certified filings for “Principal Engineer” (Computer and Information Research Scientists) in CA: $175k–$190k, median $183k. Most were filed at wage level II (100%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Sambanova Systems INC
The US Department of Labor certified 23 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 4 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Sambanova Systems INC →
About the role
SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. At the core of SambaNova's technology is the RDU (Reconfigurable Dataflow Unit) — a chip built on a dataflow architecture rather than the traditional GPU model. Its decode performance is especially strong for agentic workloads like multi-turn agents, code generation, and long-running applications. RDUs are packaged into SambaRack, rack-scale hardware that lets customers deploy state-of-the-art models with better performance, greater energy efficiency, and faster time to value. About the team The Design Verification team works on the RDU, SambaNova's chip for machine learning and AI workloads. This group focuses on chip-level control and initialization: sequencing, state transitions, clocking, and recovery across multiple subsystems on the chip. You'll build SystemVerilog and UVM verification environments alongside architects, RTL designers, and firmware engineers, and take ownership of verification plans from first draft through closure. The team works closely with the broader verification organization, so debugging and root-causing issues often means coordinating across groups rather than working in isolation. About the role SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art RDU chips for machine learning and artificial intelligence. Responsibilities • Develop and execute comprehensive verification plans for complex chip-level control and initialization features • Develop SystemVerilog/UVM based verification environments, test sequences, checkers, assertions, and functional coverage • Verify complex sequencing, dependencies, state transitions, and recovery scenarios across multiple chip subsystems • Develop directed and constrained-random tests to identify architectural and implementation corner cases • Closely work with architects, RTL designers, firmware, and other verification teams to understand design intent and drive verification closure • Debug simulation and regression failures and work with design teams to root-cause and resolve issues • Analyze regression failures, functional and code coverage and drive verification to closure Required Qualifications • B.S. in Computer Science, Computer Engineering, or related field • 5+ years relevant industry experience • Strong understanding of digital design, SoC architecture, and verification methodologies • Strong proficiency in SystemVerilog and UVM is required • Experience with constrained-random verification, functional coverage, and assertion-based verification • Good understanding of chip initialization, control sequencing, clocking, and cross-domain interactions • Strong simulation debug and problem-solving skills • Proficiency in scripting languages, e.g. Python, Perl, TCL and shell scripting, etc. is required Preferred Qualifications • Familiarity with CDC/RDC concepts and verification methodologies • Fluency in Claude / AI tools for verification development and debug Base Salary Range: Base Pay Range $120,000 — $200,000 USD Submission Guidelines Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified. EEO Policy SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and a