Jobs / United States / Nvidia Corporation

Nvidia Corporation

Senior Physical Verification Engineer

2 Locations Posted today

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 2,374 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Nvidia Corporation paid sponsored hires in similar roles69 certified filings for “Engineer Senior Verification” (Electronics Engineers, Except Computer) in TX: $161k–$184k, median $168k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 2,374 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Nvidia Corporation paid sponsored hires in similar roles
69 certified filings for “Engineer Senior Verification” (Electronics Engineers, Except Computer) in TX: $161k–$184k, median $168k. Most were filed at wage level IV (79%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

NVIDIA is hiring a Senior Physical Verification Engineer to lead signoff-quality verification for advanced silicon programs. You will drive physical verification strategy and closure for complex designs, working across implementation, methodology, and signoff teams to achieve tapeout readiness. The role requires strong technical ownership, structured debug, and the ability to scale best practices across multiple programs. This is a great match for an engineer who wants to combine technical depth with broad project impact. What you’ll be doing: • Own physical verification closure for major blocks or full-chip designs through tapeout. • Lead debugging of complex DRC, LVS, and reliability-related issues and drive high-quality resolution. • Define verification check plans, signoff criteria, and closure priorities with cross-functional teams. • Partner with physical design, custom design, and CAD teams to improve quality and turnaround. • Drive automation, methodology improvements, and best practices for scalable PV execution. • Review results, coach team members, and help reduce repeated classes of violations. What we need to see: • B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or equivalent experience. • 5+ years of experience in physical verification, backend implementation, or ASIC signoff. • Deep knowledge of DRC, LVS, physical signoff methodology, and tapeout flows. • Strong experience with industry-standard physical verification tools and foundry rule decks. • Proven ability to debug and close complex verification issues on large designs. • Strong scripting and automation skills. • Excellent communication and cross-team execution skills. Ways to stand out from the crowd: • Experience owning full-chip PV signoff at advanced nodes. • Familiarity with reliability, density, fill, ERC, or other manufacturing-related signoff checks. • Experience leading methodology improvements across teams. We are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

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