Jobs / United States / Graphcore Limited

Graphcore Limited

Senior SLT Test Engineer

Austin, Texas, United States Posted today

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Sponsorship verdict

No sponsorship evidence yet

No government record and no wording either way. Not a refusal: ask the recruiter.

  • No government sponsor record hereThis employer does not appear with approvals in the government data SponsorApply holds.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Graphcore Limited paid sponsored hires in similar roles1 certified filing for “At-Scale Hardware System Validation and BKC Test Lead” (Computer Hardware Engineers) in TX: $290k–$290k, median $290k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Graphcore Limited paid sponsored hires in similar roles
1 certified filing for “At-Scale Hardware System Validation and BKC Test Lead” (Computer Hardware Engineers) in TX: $290k–$290k, median $290k. Most were filed at wage level IV (100%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

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Before you apply

Sponsorship unknown

No register record and no sponsorship wording in the posting. Worth asking the employer before investing significant time.

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About the role

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for an experienced System Level Test Engineer to join our Product Test and Diagnosis Department (PTD). In this role, you will contribute to the development and deployment of System Level Test (SLT) solutions for next-generation AI processors. Working closely with hardware, software, validation, and manufacturing teams, you will develop test content, automation, diagnostics, and characterization capabilities that support silicon bring-up, yield learning, and manufacturing deployment. The ideal candidate will have strong technical foundations in semiconductor test and validation, excellent debug skills, and a passion for improving product quality and manufacturability. The Team The Product Test and Diagnostics team’s role is to detect and manage hardware defects that arise from the manufacture and use of our products. This covers chips, boards and finished systems and takes place both in the manufacturing sites and in the field. Responsibilities and Duties • Develop and maintain SLT test content, automation, diagnostics, and characterization workloads for silicon bring-up and manufacturing readiness activities. • Execute characterization, voltage/frequency margining, reliability screening, and performance correlation activities while analyzing results and identifying improvement opportunities. • Support development and deployment of SLT hardware including test boards, sockets, instrumentation, and thermal solutions. • Integrate validation and bring-up workloads into the SLT environment and support development of manufacturing screening solutions. • Debug failures, perform root-cause analysis, and support correlation activities across Simulation, ATE, Bench, SLT, and manufacturing environments. • Develop software tools, scripts, and automation flows for test execution, telemetry collection, data analysis, and reporting. • Contribute to improvements in test coverage, test-time optimization, DPPM reduction, and manufacturing readiness. • Work closely with Design, DFT, Silicon Validation, Product Engineering, Manufacturing, and OSAT teams to support product development and deployment activities. • Support transfer of SLT solutions into production environments and assist with manufacturing ramp activities. • Mentor junior engineers and contribute to continuous improvement of SLT methodologies and best practices. Minimum Qualifications: • Experience in semiconductor test, validation, characterization, post-silicon bring-up, or manufacturing environments. • Understanding of semiconductor fundamentals, digital systems, power delivery, signal integrity, and board-level debugging. • Familiarity with DFT concepts including scan, JTAG, BIST, MBIST, boundary scan, and manufacturing test methodologies. • Experience with Python, Tcl, Shell, or similar scripting languages for automation and data analysis. • Strong debug, problem-solving, root-cause analysis

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