Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Intel Corporation paid sponsored hires in similar roles11 certified filings for “SoC Design Engineer” (Architectural and Engineering Managers) in TX: $160k–$224k, median $192k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles
- 11 certified filings for “SoC Design Engineer” (Architectural and Engineering Managers) in TX: $160k–$224k, median $192k. Most were filed at wage level II (36%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Job Details:
Job Description:
As a SoC Design Verification Engineer, you will be responsible for ensuring the functionality and reliability of Intel's cutting-edge server SoCs. You will perform functional logic verification and emulation validation to confirm designs meet specifications, uncover potential issues, and implement corrective measures. Through your technical contributions, you will play a vital role in advancing the development of next-generation Xeon server products, driving innovation and excellence in Intel's technology offerings.
Business group
You will join Intel's Data Center Group (DCG), which is dedicated to delivering leading-edge technologies and solutions for data centers that power the world's digital infrastructure. The team focuses on validating advanced Xeon server SoCs and IPs, providing innovative solutions that enhance performance, scalability, and efficiency. The group's mission aligns with Intel's broader vision of creating world-changing technology that enriches lives globally.
Key Responsibilities
• Perform functional verification and emulation validation of integrated SoCs to ensure designs meet specifications.
• Develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.
• Execute verification plans, analyze system simulation models, and debug power and performance issues.
• Root-cause failure issues and implement corrective measures in the pre-silicon environment.
• Collaborate with architects, RTL developers, post-silicon teams, and physical design experts to enhance verification.
• Document test plans and drive technical reviews with design and architecture teams.
• Conduct regression and debug tests to integrate security activities and ensure comprehensive coverage.
• Maintain and improve verification infrastructure and methodology, absorbing learnings from post-silicon validations.
Qualifications:
This is an entry level position. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
• Master's degree in Electrical Engineering, Computer Science or Computer Engineering
• +6 months of experience in Silicon Design and/or Validation/Verification methodologies and tools.
Preferred Qualifications
• Experience in design verification for complex IPs and SoCs.
• Knowledge of UVM/SystemVerilog constrained-random coverage-based design verification methodologies.
• Familiarity with the complete verification lifecycle, including test plan creation, bug debugging, and coverage closure.
• Skills in developing validation test suites and driving continuous improvement into existing methodologies.
• Understanding of cache coherency principles in multiprocessor SoCs and layered protocols.
• Proficiency in scripting languages for automation purposes.
• Strong debugging skills and ability to independently resolve technical issues.
• Experience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation.
Join us to innovate, learn, and make a meaningful impact in Intel's transformative journey to create world-changing technology.
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Colorado, Fort Collins
Additional Locations:
US, California, Folsom, US, Oregon, Hillsboro
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex,
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