Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Intel Corporation paid sponsored hires in similar roles11 certified filings for “SoC Design Engineer” (Architectural and Engineering Managers) in TX: $160k–$224k, median $192k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles
- 11 certified filings for “SoC Design Engineer” (Architectural and Engineering Managers) in TX: $160k–$224k, median $192k. Most were filed at wage level II (36%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Job Details:
Job Description:
The Role and Impact
As a SoC Debug Engineer, you will play a pivotal role in ensuring the reliability and performance of Intel's cutting-edge products. You will perform complex debug tasks across multiple systems and subsystems, leveraging your expertise to isolate failures, resolve issues, and optimize debug processes. Your contributions will directly enhance product readiness and help deliver transformative technologies to market.
Business group
The Data Center Group (DCG) is dedicated to advancing scalable technologies that power data centers and enable the future of computing. This organization focuses on delivering innovative solutions for high-performance computing, cloud services, and enterprise systems. By joining DCG, you will be part of a team driving impactful advancements that align with Intel's broader vision for global innovation.
Key Responsibilities:
• Perform detailed and low-level debug for system-on-chip (SoC) designs and subsystems across Intel products.
• Conduct root cause analysis for triage failures and marginality issues to ensure system-wide reliability.
• Define, develop, and implement advanced debug techniques, tools, and scripts to enhance debug efficiency.
• Formulate debug requirements and strategies at the system level, ensuring alignment with architectural compatibility.
• Drive bench testing for new product features and functionality while developing methodologies for improved characterization activities.
• Collaborate with design, validation teams, and manufacturing factories to track SoC debug readiness and optimize workflows.
• Continuously improve debugging practices through innovative design-for-debug (DFD) techniques and workflows.
The ideal candidate should show the following behavioral traits:
• Strong analytical and problem-solving skills with attention to detail.
• Effective communication skills willing to work across diverse technical teams.
Qualifications:
Minimum Qualifications are required to be initially considered for this position:
• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
• 3+ years of hands-on experience in:
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• SoC debugging gained through internships, academic projects, coursework, or hands-on training.
• SoC design, architecture, firmware, and software debugging techniques.
• Debug tools, DFD technologies, and scripting languages.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
• Master's degree in Electrical Engineering, Computer Engineering or related field.
• Interested in innovation and continuous improvement in debugging methodologies and workflows.
Your expertise and dedication will help shape the future of Intel's products and technologies. Join us to make a meaningful impact and drive innovation in the world of computing.
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Massachusetts, Beaver Brook
Additional Locations:
US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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