Jobs / United States / Astera Labs INC

Astera Labs INC

Hardware Board Validation Engineering, Director

San Jose, California, United States Posted today

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LeadershipNetworkingCompliance

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Astera Labs INC paid sponsored hires in similar roles11 certified filings for “Tech Lead System Validation Engineer” (Industrial Engineers) in CA: $155k–$176k, median $170k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Astera Labs INC paid sponsored hires in similar roles
11 certified filings for “Tech Lead System Validation Engineer” (Industrial Engineers) in CA: $155k–$176k, median $170k. Most were filed at wage level IV (55%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Director, Hardware Board Validation Engineering On-Site - San Jose, Ca Role Overview Astera Labs is seeking a Director of Hardware Board Validation Engineering to lead the development, bring-up, and validation of board products that enable rack-scale AI infrastructure. Working closely with ASIC, systems, firmware, signal integrity, power integrity, mechanical, thermal, manufacturing, and customer engineering teams, you will guide products from concept and architecture through qualification and mass production. This is a hands-on leadership role in a fast-moving environment. You will lead a talented engineering team while stepping in to solve complex technical problems, engage directly with customers, and improve hardware development processes. Your work will help ensure Astera Labs’ connectivity and memory products deliver reliable, high-performance systems for cloud service providers, server manufacturers, and networking OEMs. Key Responsibilities • Board Product Strategy and Technical Leadership • Lead board validation strategy across product definition, architecture, component selection, schematic capture, layout review, bring-up, debug, optimization, qualification, and production release. • Define validation plans, coverage goals, risk assessments, schedules, and exit criteria for high-speed boards, add-in cards, modules, and system platforms. • Make hands-on technical contributions to unblock critical design, validation, and customer issues in a dynamic, fast-paced environment. • High-Speed Hardware Validation • Direct board bring-up, silicon/PCB debug, system characterization, margin analysis, and performance optimization across voltage, temperature, channel, and workload conditions. • Validate high-speed NRZ and PAM4 SerDes-based protocols, including PCIe Gen 3 and above and Ethernet 25G and above, as well as LPDDR4/5 or related memory interfaces. • Apply signal integrity, power integrity, and power architecture expertise to identify risks and drive practical solutions across circuits, power distribution, connectors, sockets, and cables. • Cross-Functional and Customer Execution • Partner with ASIC, post-silicon validation, firmware, systems, mechanical, thermal, quality, compliance, manufacturing, and customer engineering teams to deliver robust board products. • Engage key customers to understand system requirements, evaluate form factors, propose complete board solutions, and resolve issues through production support. • Collaborate with contract manufacturers, PCB vendors, and external suppliers to ensure designs are manufacturable, testable, and scalable. • Team Development and Productization • Build, mentor, and develop a high-performing hardware engineering team while establishing clear ownership, technical standards, and execution mechanisms. • Drive products from concept to mass production, including design reviews, validation reporting, manufacturing readiness, documentation, and post-production support. • Improve hardware devel

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