Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Intel Corporation paid sponsored hires in similar roles111 certified filings for “Component Design Engineer” (Electronics Engineers, Except Computer) in TX: $115k–$143k, median $136k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles
- 111 certified filings for “Component Design Engineer” (Electronics Engineers, Except Computer) in TX: $115k–$143k, median $136k. Most were filed at wage level III (50%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Job Details:
Job Description:
Are you interested in building the next generation of high-performance, power-efficient CPUs?
Join Intel as a CPU Physical Design Engineer and begin your career working on advanced processor technology. In this early-career role, you will work alongside experienced engineers and contribute to the physical design and verification of CPU designs from RTL to GDSII.
You will gain hands-on experience with industry-standard EDA tools and develop expertise across physical design areas including synthesis, floorplanning, place and route, clock implementation, static timing analysis, power optimization, and physical verification.
As part of the CPU Physical Design team, you will collaborate with engineers across logic design, architecture, circuits, and design automation while developing the technical expertise required to solve increasingly complex CPU design challenges.
What You’ll Do
Key responsibilities will include but not limited to:
• Implement physical design and verification flows for custom CPU designs, ranging from RTL synthesis to GDS generation, custom and memory designs.
• Perform verification and signoff processes such as formal equivalence verification, layout verification, reliability verification, and timing/power integrity analysis.
• Collaborate with logic, architecture, circuit, and design automation teams to identify opportunities for design improvements and optimize product-level parameters such as power, frequency, and area.
• Build and refine physical design methodologies and automation workflows to streamline the design process.
• Work closely with EDA vendors to enhance tool capabilities for high-speed, low-power CPU design.
Behavioral traits that we are looking for:
• Learning agility and curiosity: Eager to learn new technologies, tools, and CPU physical design methodologies.
• Problem solving: Approaches technical challenges analytically and works through problems in a structured manner.
• Collaboration: Works effectively with others and values different technical perspectives.
• Initiative and ownership: Proactively seeks information, asks thoughtful questions, and takes responsibility for assigned work.
• Communication: Clearly communicates technical ideas, questions, results, and challenges.
• Attention to detail: Demonstrates accuracy and quality when analyzing technical information and completing engineering tasks.
• Adaptability: Able to learn and grow within a fast-paced technical environment as design requirements and priorities evolve.
Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.
• See Intel Benefits for more details.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Note:
For information on Intel’s immigration sponsorship guidelines, please see
Intel U.S. Immigration Sponsorship Information
Minimum Qualifications and Experience :
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of relevant experience. Or a Master's degree in the same field with 1+ years of relevant educational or work experience.
Your experience described above must be in one or more of the following:
• Experience with at least one successful tape-out using advanced technology nodes.
• Experience with industry-standard EDA tools such as Synopsys and/or Cadence for physic
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