Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Hewlett Packard Enterprise Company paid sponsored hires in similar roles1 certified filing for “Manager Electrical/Hardware Engineering IV” (Architectural and Engineering Managers) in TX: $224k–$224k, median $224k.
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Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Hewlett Packard Enterprise Company paid sponsored hires in similar roles
- 1 certified filing for “Manager Electrical/Hardware Engineering IV” (Architectural and Engineering Managers) in TX: $224k–$224k, median $224k. Most were filed at wage level IV (100%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Principal ASIC Engineering Program Manager
This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
Job Level Definition
Contributions have substantial technical impact on a significant HPE product or project, or on a strategic or architectural direction. Serves as a go-to creator and innovator for critical business challenges and opportunities. Delivers substantial, unique contributions that provide long-lasting, recurring benefits such as improved time to market, cost reductions, execution predictability, or satisfaction of current and future customer needs. Is recognized as an internal authority in key technology and program areas and provides technical leadership to the business for significant project and program work. Leads and connects others across functions to unite around common goals, actively mentors others, and contributes to the HPE technical community.
Description
Responsibilities
• Provide strategic technical coordination and program leadership to teams of VLSI engineers and to internal and outsourced development partners across all stages of complex ASIC development, including architecture, design, verification, physical implementation, validation, manufacturing readiness, and test.
• Own executive-level management of vendors and development partners, including expectations, schedules, deliverables, commercial and technical dependencies, risk response, and recovery. Ensure alignment between VLSI physical-design progress, manufacturing readiness, material and purchase-order status, and overall program milestones.
• Anticipate and manage complex dependencies across design quality, verification and validation, partner constraints, business demand, product road maps, supply chain capacity, and customer commitments. Resolve ambiguity and unite stakeholders around a common execution plan.
• Provide decision-quality program analysis to senior executives and product stakeholders. Clearly communicate program status, tradeoffs, escalations, and recommendations, and drive timely decisions on technical scope, investment, risk acceptance, sourcing, and schedule.
• Establish durable program-management mechanisms, operating rhythms, metrics, and quality practices that improve predictability and execution across ASIC programs, rather than only within an individual project.
• Lead cross-functional alignment among engineering development, architecture, operations, finance, procurement, manufacturing, product management, marketing, software and systems teams, supply-chain organizations, end customers, and external partners.
• Demonstrate sustained leadership and measurable impact across significant programs by improving time to market, cost, quality, risk posture, execution predictability, or the ability to meet present and future customer needs.
Education and Experience Required
• Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or equivalent technical discipline.
• PMP/PMI cer
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