Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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What Intel Corporation paid sponsored hires in similar roles76 certified filings for “Engineering Manager” (Architectural and Engineering Managers) in CA: $193k–$221k, median $214k.
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Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles
- 76 certified filings for “Engineering Manager” (Architectural and Engineering Managers) in CA: $193k–$221k, median $214k. Most were filed at wage level III (36%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Job Details:
Job Description:
The Role and Impact
As a Design Verification Engineering Manager, you will lead a dynamic team of design verification engineers responsible for Xeon SoC design verification. You will deploys and manage leading silicon design verification processes, procedures, verification tools, and technologies based on latest best industry practices. You will work with design, microarchitecture, and post-silicon validation teams to identify design bugs and improve overall microarchitecture. You will also bring a culture of rapid execution with high quality and simplify complicated process flows. This critical role ensures delivery excellence, directly contributing to Intel's broader success in creating innovative technology solutions.
Business group
The Data Center Group (DCG) is at the forefront of Intel's mission to deliver advanced technologies that power cloud computing, enterprise, AI, and edge solutions. Within DCG, the DSE Xeon SoC Engineering organization specializes in developing cutting-edge SoC designs to drive next-generation data center performance. Joining this team means being part of a collaborative environment dedicated to shaping the future of data-driven innovation.
Key Responsibilities
- Present status of Verification and quality of design to senior executives in clear and concise manner and present solutions when design hits critical issues.
- Collaborates with program leaders on the verification delivery and regression metrics against milestone requirements. Understands security milestone expectations and works with SoC security validation teams to incorporate security-related testing through validation, hackathon reviews, and new validation techniques to improve security coverage. Executes security and security development lifecycle tasks per job role and schedule milestones.
- Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.
- Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment. Create future technical leaders who imbibe the rapid execution and can-do attitude.
Qualifications:
Minimum Qualifications
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or a related field.
- 12+ years of experience in ASIC/SoC design and verification with a Bachelor's degree, 8+ years with a Master's degree, or 6+ years with a PhD.
- Comprehensive knowledge of industry-standard protocols.
Preferred Qualifications
- Proven experience in formal people management or leadership roles, with 5-10+ years in managing technical teams.
- Familiarity with AI and GPU technologies.
- Experience with hardware emulation platforms.
- Strong interpersonal and communication skills to effectively lead cross-functional teams and drive results.
We invite you to bring your leadership, technical expertise, and passion for innovation to Intel, where you'll have the opportunity to make a meaningful impact on groundbreaking technologies.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
This role is a Position of Tr
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