Skills this job asks for
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Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Hewlett Packard Enterprise Company paid sponsored hires in similar roles59 certified filings for “Systems/Software Engineer III” (Software Developers) in CA: $149k–$206k, median $183k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Hewlett Packard Enterprise Company paid sponsored hires in similar roles
- 59 certified filings for “Systems/Software Engineer III” (Software Developers) in CA: $149k–$206k, median $183k. Most were filed at wage level II (43%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Senior Principal Interconnect Development Engineer
This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
Job Summary : Individual contributor role responsible for high-speed interconnect solutions for next-generation network switches and routers, requiring dense, state-of-the-art frequency performance and quality. Includes both connectors and cables.
Roles
• Works as the key development engineer positioned between hardware design engineering and interconnect suppliers, managing and influencing interconnect technology roadmaps
• Works on interconnect technologies that are ‘pre-NPI’ or ‘pre-product’, to validate that future interconnect technologies are viable for system level designs that may be 2-5 years away from realization. Provides technical consultation support for interconnect component engineering, for NPI launch and interconnect activities.
• Responsible for development and execution of key interconnect technology validation plans, including the design and implementation of test vehicles to validate mechanical and signal integrity (SI) elements.
• Works with Interconnect suppliers and hardware engineering on key co-development projects, and design-related problem solving. Able to influence both internal and external stakeholders to drive design-related changes as needed. Able to impact suppliers, both technically as well as commercially.
• Provide persuasive understanding of trade-offs between mechanical design, SI, FMEA, failure analysis (electrical, physical, analytical, schematic), DOE and simulation versus reality/measurements
Qualifications
• Demonstrated industry expertise: industry consortium participation and leadership, patents, published technical papers, and conference presentations. Lead and influence stakeholders in the Interconnect industry.
• Cross-functional expertise with hardware engineering, mechanical engineering, PCB, electrical (ex: SI), thermal engineering, program management, commodity (commercial) management and mechanical (stamping, molding), as well as other interconnect-adjacent technologies
• Be current with industry trends and able to provide a compelling and attainable vision for five years out
• Sophisticated knowledge of variation statistics and process control as relates to sound design and manufacturability of new connectors, including measures for successful first-pass design-in into native and partner NPI environments
• Expert familiarity with industry standards for qualification and reliability
• Presentation skills, communication skills, influencing skills
Experience
• Deep industry experience (15 years), including 10 years of hands-on proficiency with high-speed, complex interconnect (≥56 GHz, ≥100 differential pairs) hardware…and successful field deployment.
• Experience must include both connectors AND high-speed cables, as well as interconnect materials and mechanical/electrical trade-offs
• 3D CAD modeling experience and geometric tolerance analysis abilities. Ex: tools = S
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