Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Intel Corporation paid sponsored hires in similar roles139 certified filings for “Software Engineer” (Software Developers) in CA: $144k–$178k, median $156k.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles
- 139 certified filings for “Software Engineer” (Software Developers) in CA: $144k–$178k, median $156k. Most were filed at wage level III (52%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Job Details:
Job Description:
Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.
We are looking for an experienced engineer to join the PDK Reliability Verification / EMIR team. This role will contribute to the development, qualification, and delivery of production-quality EM/IR reliability collateral and methodologies across advanced process technologies. The team owns PDK and related EMIR enablement and supports multiple EDA platforms including Synopsys Totem/Totem-SC and PrimeSim-EMIR, Cadence Voltus/Voltus-XFi, and Ansys RedHawk-SC. The work includes Custom and ASIC EMIR, advanced process enablement, 3DIC-related reliability verification, and thermal enablement.
Responsibilities
Develop, qualify, and maintain PDK EMIR collateral, documentation, and technology-specific configurations.
Own or contribute to PDK and Reliability Technology Kit ( RTK ) development, qualification, QA, and release readiness.
Develop and maintain test structures and automated validation for EM/IR collateral, including validation and cross-tool correlation.
Enable new process features and advanced interconnect structures across current and future process technologies.
Debug complex modeling and correlation issues involving extraction, EM/IR analysis, PDK collateral, and EDA tools, working from root cause through validated resolution.
Perform cross-tool/vendor correlation across supported EMIR platforms and drive issues to closure with EDA vendors.
Work closely with PDK, Extraction, LVS, QnR, ASIC RV, design-flow, and customer-facing teams.
Support adoption and qualification of next-generation solutions such as Totem-SC and emerging EMIR/extraction capabilities.
Improve development and QA efficiency through Python/Tcl/Perl/Skill or similar automation, data analysis, regression infrastructure, and AI-assisted development and debug where appropriate.
Partner with Synopsys, Cadence and internal engineering teams to resolve tool limitations, qualify new releases, and ensure production readiness.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications :
Bachelors & 4+ years or Masters & 3+ years in Electrical Engineering, Computer Engineering, or a related field of related experience in the following.
Strong semiconductor design, EDA, physical-design, PDK, or reliability-verification background.
Experience in one or more of:
Electro Migration/IR or reliability verification
Parasitic extraction
SPICE/post-layout simulation
PDK/technology-file development
Physical verification
EDA tool qualification
Strong scripting/automation skills, preferably Python, Tcl, Perl, Skill or equivalent.
Strong debugging skills with the ability to isolate problems spanning technology collateral, extraction, simulation, and analysis.
Ability to work effectively across multiple engineering organizations and with EDA vendors.
Preferred Qualifications:
Experience with Totem/Totem-SC, PrimeSim-EMIR, Voltus/Voltus-XFi, RedHawk-SC, StarRC, Quantus/QRC, or similar tools.
Understanding of Electromigration, IR drop, current-density limits
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