Jobs / United States / Astera Labs INC

Astera Labs INC

Senior Principal Engineer - FW/SW Development

San Jose, California, United States Posted today

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Skills this job asks for

LeadershipCI/CDProduct managementC++

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Astera Labs INC paid sponsored hires in similar roles26 certified filings for “Tech Lead Firmware Engineer” (Electronics Engineers, Except Computer) in CA: $157k–$216k, median $165k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Astera Labs INC paid sponsored hires in similar roles
26 certified filings for “Tech Lead Firmware Engineer” (Electronics Engineers, Except Computer) in CA: $157k–$216k, median $165k. Most were filed at wage level II (42%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is seeking a Senior Principal / Distinguished Engineer - FW/SW Development to join our engineering team in San Jose, CA. This is a high-impact individual contributor role at the heart of our Intelligent Connectivity Platform, where you'll architect and develop firmware and software that powers the next generation of AI infrastructure connectivity solutions. As a Senior Principal / Distinguished Engineer, you'll operate across the full stack — from low-level embedded firmware running on custom silicon to higher-level software tools and frameworks that enable our customers to deploy and manage Astera Labs products at scale. You'll work at the intersection of hardware and software, collaborating closely with ASIC design, verification, applications, and systems engineering teams to deliver world-class solutions spanning PCIe, CXL, and Ethernet connectivity. This role offers extraordinary breadth and technical ownership. You'll influence architectural decisions across multiple product lines, mentor engineers across the organization, and drive best practices in firmware/software development as Astera Labs continues its hyper-growth trajectory powering the AI revolution. Key Responsibilities • Firmware & Software Architecture • Architect and develop production-quality embedded firmware for Astera Labs connectivity ASICs, including boot code, initialization sequences, and runtime firmware • Design and implement host-side software, drivers, and SDK components that enable seamless integration of Astera Labs products into customer platforms • Define firmware/software architecture strategies that scale across multiple product lines and generations • Cross-Functional Technical Leadership • Partner with ASIC design and verification teams to define hardware-firmware interfaces and co-design features for optimal system performance • Drive technical decisions spanning firmware, diagnostic tools, manufacturing software, and customer-facing utilities • Collaborate with applications and field engineering teams to resolve complex system-level issues at customer sites • Quality & Best Practices • Establish and evolve firmware/software development processes, coding standards, and CI/CD practices across the engineering organization • Lead design and code reviews, driving a culture of engineering excellence and continuous improvement • Mentor and guide engineers across multiple teams, raising the overall technical bar of the organization • Innovation & Strategy • Evaluate emerging technologies and industry trends to inform next-generation firmware/software strategies • Contribute to product roadmap discussions, providing firmware/software feasibility analysis and effort estimation • Drive innovation in areas such as firmware update mechanisms, telemetry, RAS features, and manageability frameworks Basic Qualifications • Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field • 12+ years of exper

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