Jobs / United States / Intel Corporation
Low Yield Analysis Engineer on Shift
Intel Corporation · 🇺🇸 US, Oregon, Hillsboro
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles287 certified filings for “Process Engineer” (Materials Engineers) in OR: $113k–$133k, median $133k. Most were filed at wage level III (87%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Intel Corporation
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Intel Corporation →
About the role
Job Details: Job Description: APTD LYA is a Foundry Labs Network organization that supports back-end package assembly and wafer level assembly sort and test fails to help root cause yield loss and in-line failures. In this electrical-characterization hybrid role, the engineer on shift will be responsible for technical functions such as design, test, checkout, modifications, and characterization of wafer level assembly technologies. Engineers on back or front of week shift schedules will help bridge support between engineering technicians, as well as shift 1 engineers and module partners, yield support, integration and both internal and external customers in a collaborative environment. As an LYA Engineer, you will set priorities for the platform/project, get results across boundaries, and ensure an inclusive work environment. In this role, engineers can expect to work with a team of engineers and engineering technicians to conduct various analyses and engineering tests to provide platforms with root cause determination of in-line electrical failures and perform defect and/or process characterization in support of identifying key mechanisms that contribute to root cause identification. Your main responsibilities include, but are not limited to: - Working across team boundaries to achieve strategic objectives and meet program deliverables. - Understand program milestones and schedules then translate into team objectives and drive execution. - Interface with a wide variety of internal teams, as well as external suppliers to improve yield and drive innovation. - Project management, package design and/or development and sustaining support for integrated circuit or semiconductor assemblies, as well as various other electronic components and/or completed units. - Conduct hands-on lab work, define data acquisition strategy and data analysis plan, and recommend corrective actions and/or fixes to internal customers. - Develop failure analysis innovative techniques, BKMs, and/or approaches to accelerate failure identification and mechanism understanding. - Provide consultation concerning packaging and/or assembly problems and improvements in the manufacturing process. - Respond to customers' requests or events as they occur. - Candidate should be capable of working effectively across organizational boundaries. - Candidate must exhibit the following traits/skills: Work with ambiguity and flexibility with respect to job roles and working hours, have strong analytical and problem-solving skills, and possess robust communication and presentation skills. This role is lab-based and on-site required. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through schoolwork and/or classes and/or project work and/or internships and/or military training and/or work experience. Minimum Qualifications: Must possess a Bachelor's Degree with at least 2 years of experience or Master's Degree in Materials Science and Engineering, Mechanical Engineering, Chemical Engineering, Electrical Engineering, or Chemistry and Physics or related field. Preferred Qualifications: • Prior experience working in a lab environment. • Experience with destructive and optical analysis techniques such as manual cross-sectioning and delayering, SEM, x-ray, microscopy, CSAM, ion milling, TEM and FIB • Experience performing electrical fault isolation and failure analysis on product and TV through the use of hand probe, curve trace, auto probing, TDR, EOTPR, EBAC, RIDR, and/or ELITE. • Experience with chemical compositional analysis techniques such