Jobs / United States / Intel Corporation
Senior CPU Architecture and Benchmarking Engineer
Intel Corporation · 🇺🇸 US, Oregon, Hillsboro
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles287 certified filings for “Process Engineer” (Materials Engineers) in OR: $113k–$133k, median $133k. Most were filed at wage level III (87%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
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Sponsor Radar — Intel Corporation
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Intel Corporation →
About the role
Job Details: Job Description: About the Role Join Intel's architecture team as a Senior CPU Architecture and Benchmarking Engineer. You will drive rigorous, low-level investigations into CPU designs, crafting targeted microbenchmarks that expose microarchitectural behavior at fine granularity and translating those findings into actionable architectural guidance. Your work will bridge the gap between silicon measurement, software behavior, and architectural definition, playing a key role in shaping Intel's future CPU roadmap. Key Responsibilities • Design, implement, and analyze pinpointed microbenchmarks to explore and characterize low-level microarchitectural behavior including branch prediction, instruction fetch/decode, execution units, memory subsystem, prefetchers, and power delivery interactions • Investigate and document microarchitectural details of CPU designs through systematic benchmarking and analysis • Evaluate the impact of system software layers — including OS schedulers, runtime libraries, compilers, and firmware — on end-product CPU performance and power efficiency • Identify power/performance gaps and propose concrete architectural solutions and mitigations • Collaborate with silicon lab, simulation, backend, and RTL teams to correlate benchmarking findings with pre-silicon models and post-silicon measurements • Explore and evaluate proposed microarchitectural ideas in CPU performance simulators, providing quantitative measure of value • Develop and maintain tooling, test infrastructure, and analysis frameworks to support repeatable and scalable benchmarking workflows • Communicate technical findings clearly and persuasively in written reports and presentations to senior engineering and product teams To Be Successful in This Role, You Should Demonstrate • Intellectual curiosity and a systematic mindset when investigating complex microarchitectural behavior, with the rigor to design experiments that yield clear, reproducible conclusions • Strong cross-functional collaboration skills, with the ability to work effectively across silicon, simulation, and software teams to align findings and drive architectural decisions • The ability to communicate complex technical findings with clarity and confidence to both engineering peers and senior leadership audiences Qualifications: Minimum Qualifications • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline with 8+ years of relevant industry experience, OR a Master's Degree in a related discipline with 6+ years of relevant industry experience • Deep understanding of out-of-order CPU microarchitecture, including pipeline stages, execution resources, memory hierarchy, and power/performance interactions • Demonstrated experience designing and interpreting low-level microbenchmarks for CPU characterization • Proficiency in assembly programming and low-level performance tooling (e.g., EMON/PMU counters, VTune, or equivalent) • Strong background in performance analysis methodologies, bottleneck identification, and quantitative trade-off evaluation • Proficiency in C/C++ and scripting languages (Python or similar) for benchmark development and data analysis Preferred Qualifications • Familiarity with cycle-accurate CPU performance simulators and the ability to model and evaluate new microarchitectural features • Understanding of software stack impacts on CPU performance, including OS scheduler behavior, memory allocators, compiler code generation, and BIOS/firmware tuning • Experience reading or debugging RTL to investigate microarchitectural behavior or validate benchmark hypotheses • Track record of translating benchmarking insights into concrete architectural recommendations or published technical