Jobs / United States / Intel Corporation
Senior CPU Silicon Analysis Engineer
Intel Corporation · 🇺🇸 US, Oregon, Hillsboro
Sponsorship verdict
Sponsorship possible
One solid signal, not two — worth applying, and worth asking about sponsorship early.
- Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
- The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
- No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Intel Corporation paid sponsored hires in similar roles287 certified filings for “Process Engineer” (Materials Engineers) in OR: $113k–$133k, median $133k. Most were filed at wage level III (87%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
- Confirmed live todayWhen a source last listed this job as open.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence; it is not legal advice and never a guarantee — the employer and the immigration authority decide. Sign in to factor in where you can already work.
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Sponsor Radar — Intel Corporation
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. USCIS also records 1,112 H-1B approvals in FY2023. Source: LCA disclosure data (US Department of Labor (OFLC)).
Past sponsorship or register membership never guarantees sponsorship for this vacancy or for you. Full Sponsor Radar for Intel Corporation →
About the role
Job Details: Job Description: About the Role Join Intel's architecture team as a Senior CPU Silicon Analysis Engineer. In this role, you will be central to in-depth studies of CPU designs, providing critical data-driven guidance for future CPU roadmap decisions. You will own silicon bring-up, maintenance, and a wide range of measurements to characterize processor behavior across power, performance, and physical operating conditions. Your findings will directly influence architectural decisions at the highest levels of Intel's CPU development organization. Key Responsibilities • Own and operate lab infrastructure for systematic silicon characterization, including bring-up, maintenance, and debug of pre-production and production platforms • Plan and execute measurements across a broad range of metrics including performance, IPC, power, dynamic capacitance, leakage, voltage-frequency curves, and microarchitectural telemetry • Design and execute structured measurement campaigns to characterize silicon behavior under a variety of operating conditions, workloads, and thermal/power envelopes • Analyze and interpret silicon data to identify power/performance gaps, anomalies, and opportunities relative to architectural expectations and roadmap targets • Collaborate with architecture, benchmarking, backend design, and simulation teams to correlate lab results with pre-silicon models and design data, and to drive root cause analysis of discrepancies • Develop tooling, scripts, and automation to streamline data collection, processing, and reporting pipelines • Communicate findings clearly through technical reports and presentations to engineering leadership and cross-functional stakeholders To Be Successful in This Role, You Should Demonstrate • A methodical, detail-oriented approach to lab work and data analysis, with the discipline to maintain accuracy across complex, multi-dimensional data sets • Strong collaborative instincts and the ability to work effectively across architecture, design, and simulation teams to drive alignment and root cause resolution • Clear and confident communication skills, with the ability to translate technical findings into actionable insights for both engineering peers and leadership audiences Qualifications: Minimum Qualifications • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline with 8+ years of relevant industry experience, OR a Master's Degree in a related discipline with 6+ years of relevant industry experience • Hands-on experience with silicon lab environments, including platform bring-up, debug, and instrumentation • Experience collecting and analyzing silicon power and performance metrics such as IPC, Frequency, Cdyn, leakage, and microarchitectural telemetries • Proficiency in scripting languages (Python, Bash, or similar) for test automation and data analysis • Strong analytical skills and ability to draw actionable conclusions from complex, multi-dimensional silicon data sets Preferred Qualifications • Experience characterizing CPU silicon across a range of designs and operating conditions • Familiarity with EMON/PMU-based performance profiling and OS-level performance tooling • Understanding of CPU microarchitecture sufficient to interpret performance counter data and correlate measurements to architectural behavior • Exposure to backend design concepts such as voltage-frequency corner selection, leakage-frequency tradeoffs, and process library characteristics • Experience with RTL simulation or pre-silicon performance modeling and correlation workflows • Background in silicon-based benchmarking and performance characterization of processor designs Job Type: Experienced Hire Shift: Shift 1 (United St