Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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What Astera Labs INC paid sponsored hires in similar roles26 certified filings for “Tech Lead Firmware Engineer” (Electronics Engineers, Except Computer) in CA: $157k–$216k, median $165k.
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Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Astera Labs INC paid sponsored hires in similar roles
- 26 certified filings for “Tech Lead Firmware Engineer” (Electronics Engineers, Except Computer) in CA: $157k–$216k, median $165k. Most were filed at wage level II (42%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .
Fabric Modeling and Analysis Engineer- Scale Up Fabric
Role Overview
Astera Labs is powering the connectivity behind rack-scale AI, and our Scorpio Scale-Up Fabric is central to how tomorrow’s GPU clusters scale. As a Fabric Modeling and Analysis Engineer, you will own the performance models that shape this fabric — quantifying bandwidth, latency, and throughput ceilings, and predicting how Scorpio hardware behaves under real AI/ML workloads long before silicon exists.
This is a high-impact role for an engineer who thrives where architecture, performance analysis, and software converge. Your models will shape the next generate products and enable informed architectural decisions ahead of tape-out, surface bottlenecks that only appear at scale, and translate directly into roadmap and IP decisions. As Astera Labs continues its hyper-growth, you’ll be the internal authority on fabric modeling.
Key Responsibilities
• Simulation Infrastructure & Model Correlation
• Design, implement, and maintain features in AI/ML system simulators and fabric models, extending support for collective communication, transport, topology, congestion, routing, buffering, scheduling, and traffic management
• Improve simulator fidelity, scalability, debuggability, and runtime performance across packet-level, flow-level, and analytical backends, and build reusable abstractions and APIs for end-to-end simulation flows
• Continuously calibrate and validate models against benchmark data from the Performance Engineering team, owning the correlation between model predictions and measured silicon across scale up fabric generations
• Analytical & Fabric Performance Modeling
• Design and implement transaction-level or cycle-approximate system models of the Scale up fabric, enabling rigorous evaluation of new architectural ideas early in the design cycle, well before tape-out
• Develop and own theoretical roofline and analytical models that establish bandwidth, latency, and throughput ceilings for the Scale-Up fabric, mapping AI/ML workload demands against fabric capabilities to identify compute-bound vs. fabric-bound regimes
• Model AI/ML collective communication patterns (AllReduce, AllGather, ReduceScatter) and next-generation features such as advanced congestion control, In-Network Computing, and novel resiliency at scale
• Workload Characterization, Scalability & Topology Analysis
• Model fabric performance as clusters scale from tens to thousands of GPUs, evaluating topological choices and configurations and their impact on latency, bandwidth, and congestion
• Proactively identify architectural bottlenecks that would otherwise only surface at scale and propose solutions in the in-house network model
• Innovation, Competitive Analysis & Roadmap Influence
• Build analytical models of competing fabric architectures and evaluate emerging interconnect technologies — such as UALink, ESUN, and optical fabrics — to assess their impact on future Scorpio generations
• Translate modeling in
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