Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
-
✓
Employer is on a government sponsor recordThe US Department of Labor certified 4 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
-
?
The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
-
?
No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
-
✓
What Innophase Iot INC paid sponsored hires in similar roles2 certified filings for “Senior Staff Engineer, Software/Firmware” (Software Developers) in CA: $190k–$191k, median $191k.
-
✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 4 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Innophase Iot INC paid sponsored hires in similar roles
- 2 certified filings for “Senior Staff Engineer, Software/Firmware” (Software Developers) in CA: $190k–$191k, median $191k. Most were filed at wage level IV (100%) — 4 lottery entries, ≈61% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
About InnoPhase IoT
If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of work--not just singing the same song every day, you’ll find your playground at Innophase IoT.
We are looking for people seeking AWESOMENESS! If you’re good at what you do, you can work anywhere. If you’re the best at what you do, come work at Innophase IoT!
As a Sr. Staff/Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communication. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to delivering high quality digital solutions, the team supports other disciplines with work product such as Verilog stimulus files, test benches for device bring up/characterization, test vectors for product manufacturing.
Key Responsibilities
• Contribute to SoC architecture development for high-performance low-power IoT devices
• Employ skills in SystemVerilog, Python, Tcl, UPF to bring designs from concept through architecture to silicon and, finally, high-volume production
• Work cross-functionally with Systems/RF/software/firmware/verification/validation/operations teams
• Support schedule and resource planning to deliver products to market on time
• Help to define digital/system design and implementation methodologies and test strategies and flows
Job Requirements
• Theoretical and practical knowledge of SoC architectures employing embedded processors
• Familiarity with common bus architectures like AXI/AHB/APB/OBI
• Deep RTL design knowledge (SystemVerilog)
• Experience with multi-clock and multi-power domain systems and strategies to control and minimize power consumption
• Understanding of timing constraints, static timing analysis and timing closure
• Experience with Arm TrustZone, device lifecycle states, Secure Boot, and PSA Certified Level 2+ security.
• MS/PhD EE/CS preferred
Desirable Skills
• You have an engineering mindset, and you believe that communication is key to growing a team stronger
• Able to work effectively with incomplete or changing requirements
It is key to unleash the potential in every employee, every team, every leader, and the company herself. We know employees perform best when motivated, appreciated and recognized, and can be themselves. We are committed to building a culture where every voice can be heard, everyone has room for growth and can make meaningful contributions. At the end of the day, we want success not just for the company, but also for everyone who believes in the company, the vision, and the future.
Apply on employer site ↗