Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 63 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .
Principal Engineering Program Manager, (EPM)
Location: San Jose, CA (Onsite)
Role Overview
As a Principal Engineering Program Manager on our Analog/Mixed-Signal (AMS) team, you will drive the execution of the complex silicon programs that power Astera Labs' purpose-built connectivity solutions. You'll orchestrate multi-disciplinary teams — spanning circuit design, layout, verification, and silicon validation — to deliver high-performance AMS IP on schedule, on budget, and to spec.
This is a high-impact leadership role at a hyper-growth company defining the connectivity backbone of the AI era. You'll own program plans from concept through tape-out and silicon bring-up, surface and resolve cross-functional risks, and bring the operational rigor that turns ambitious engineering into products shipping at rack scale. Your ability to align stakeholders and keep fast-moving programs on track will be central to Astera's continued momentum.
Key Responsibilities
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Program Planning & Execution
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Define, drive, and maintain end-to-end program schedules for AMS IP development, from specification through tape-out and validation
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Manage critical path, milestones, and dependencies across circuit design, layout, verification, and silicon bring-up
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Establish and track program metrics, budgets, and deliverables to ensure predictable, high-quality outcomes
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Cross-Functional Leadership
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Partner with AMS design, digital, systems, product, and operations teams to align priorities and resolve blockers
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Lead program reviews, drive decision-making, and communicate status, risks, and trade-offs to leadership and stakeholders
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Coordinate with external partners, foundries, and vendors on tape-out readiness and schedule commitments
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Risk Management & Process Excellence
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Proactively identify, quantify, and mitigate technical and schedule risks across concurrent programs
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Drive continuous improvement of program management processes, tools, and best practices for AMS execution
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Champion clear documentation, accountability, and operational discipline across the program lifecycle
Basic Qualifications
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Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field
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8+ years of experience in program or project management within semiconductor, IC, or hardware development
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Proven track record managing complex silicon or AMS/IP programs through tape-out and silicon validation
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Strong understanding of the ASIC/IC development lifecycle, including design, verification, layout, and bring-up
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Excellent stakeholder management, communication, and cross-functional leadership skills
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Proficiency with program management and collaboration tools (e.g., Microsoft Project, Microsoft 365)
Preferred Qualifications
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MS in Electrical Engineering, Computer Engineering, or a related field
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Direct experience with analog/mixed-signal or high-speed connectivity programs
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PMP certification or equivalent program management credential
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Familiarity w
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