Sponsorship verdict
Sponsorship possible
One solid signal, not two. Worth applying, and worth asking about sponsorship early.
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✓
Employer is on a government sponsor recordThe US Department of Labor certified 193 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
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The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
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No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
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✓
What Medtronic INC paid sponsored hires in similar roles1 certified filing for “Senior IC Design Engineer – Analog” (Electronics Engineers, Except Computer) in AZ: $139k–$139k, median $139k.
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Confirmed live todayWhen a source last listed this job as open.
Details and sources
- Employer is on a government sponsor record
- The US Department of Labor certified 193 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
- No salary bar for this route
- H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
- What Medtronic INC paid sponsored hires in similar roles
- 1 certified filing for “Senior IC Design Engineer – Analog” (Electronics Engineers, Except Computer) in AZ: $139k–$139k, median $139k. Most were filed at wage level III (100%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).
US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).
A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.
About the role
We anticipate the application window for this opening will close on - 9 Nov 2026
Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact.
A Day in the Life
At Medtronic, our ASICs contribute to human welfare by restoring health and extending life; it's part of our Mission. We have an integrated Mixed-Signal ASIC team contributing to the implementation and innovation of cardiac pacing, defibrillation, and monitoring therapies. This means our designers need to understand and participate in the big picture of how their work impacts the end user, a patient. Opportunities to meet doctors and witness implants directly connect our work to patient outcomes and lives.
Our team is working on Medtronic's next generation of Cardiac Rhythm Management (CRM) products, supported by our designers through roles including requirements definition, design exploration and implementation, simulation analysis, circuit evaluation and verification, physical design, lab testing supporting characterization and formal verification, production test, and other tasks in the development of implantable cardiac devices.
At Medtronic, we bring bold ideas forward with speed and decisiveness to put patients first in everything we do. In-person exchanges are invaluable to our work. We’re working a minimum of 4 days a week onsite as part of our commitment to fostering a culture of professional growth and cross-functional collaboration as we work together to engineer the extraordinary.
This position will be based in Mounds View, MN.
We are seeking a Principal IC Design Engineer - Analog to help lead the development of next generation Cardiac Rhythm Management devices.
Role and Responsibilities
• Specify, develop and design analog and mixed-signal integrated circuits as individual contributor and through coaching of peer and less-experienced teammates.
• Define direction for circuit innovation and changes through gathering and reduction of requirements or needs from product, project, systems, test, research, or firmware engineering.
• Foster communication and collaboration across team and supporting departments.
• Take ownership and responsibility for design(s) through entire development cycle from concept through release to production.
• Create schematics and verification simulations within Cadence EDA tools
• Develop and maintain simulation testbenches using Spectre and ADE to verify functionality and ability to meet specifications over PVT variations.
• Integrate test strategy into design for highly testable ICs or built-in self-test architectures.
• Integrate designs into Mixed-Signal, AMS, modeling simulations supporting chip-level verification.
• Translate circuit requirements into layout directions that drive signal integrity, matching, thermal, etc.
• Direct and review IC layout activities within Cadence Layout tools.
• Create parasitic extraction of physical design and perform impact analysis.
• Specify, direct and perform design characterization and verification of ICs and electronic modules.
• Develop, configure, and run complex characterization tests using test and measurement equipment and other lab tools including LabView and Python for automation.
• Conduct concept, preliminary, critical and fracture reviews to ensure device quality, capability and functional requirements.
• Review EDA tool vendor offerings wit
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