Jobs / United States / Northrop Grumman Systems Corporation

Northrop Grumman Systems Corporation

Principal/ Sr. Principal FPGA Design Engineer

United States-Illinois-Rolling Meadows Posted today

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AgileC++Python

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Sponsorship verdict

No sponsorship evidence yet

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  • No government sponsor record hereThis employer posted directly and does not match a government sponsor register.
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  • Confirmed live todayWhen a source last listed this job as open.
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No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

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About the role

RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Embark on a career putting innovative, reliable, and agile products and ideas into orbit, and beyond. Northrop Grumman Space Systems has opportunities waiting for you that play a vital role in human space exploration, national defense, and scientific discovery, supporting multiple programs across the universe. With us, you’ll discover a culture of curiosity and collaboration that will have you Defining Possible from the day you start. Our space systems connect and protect millions of people on earth every day, now and for the future.  Explore your future and launch your career with Northrop Grumman Space Systems today! Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! We are seeking a talented FPGA Design engineer with signal processing experience to join our growing team in Rolling Meadows, IL. As an FPGA Design Engineer, you will join our diverse team and be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our digital signal processing products. You will be working with digital subsystem and circuit card designs that utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Intel (Altera), and Microsemi (Actel) and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Your expertise in digital signal processing, modeling and simulation, and circuit level design and test are desired for this position.  This position will be filled as a level 3 or level 4. Basic Qualifications • Principal FPGA Design Engineer (Level 3):  Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 5 years (or MS and 3+ years, or a PhD) of FPGA/ASIC design experience. • Sr. Principal FPGA Design Engineer (Level 4): Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or MS and 6+ years, or PhD +3 years) of FPGA/ASIC design experience. • In-depth knowledge of VHDL and/or Verilog • -Proficiency in High level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C++ • Expertise achieving timing closure on dense FPGA designs • Working knowledge of DSP structures and techniques • Proficient in Python, C or other scripting languages • Extensive experience generating test benches • Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis • Experience with

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