Jobs / United States / Intel Corporation

Intel Corporation

GPU Design Verification Engineer

2 Locations; US, California, Folsom Posted today

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Intel Corporation paid sponsored hires in similar roles211 certified filings for “Component Design Engineer” (Electronics Engineers, Except Computer) in CA: $125k–$167k, median $142k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Intel Corporation paid sponsored hires in similar roles
211 certified filings for “Component Design Engineer” (Electronics Engineers, Except Computer) in CA: $125k–$167k, median $142k. Most were filed at wage level III (43%) — 3 lottery entries, ≈46% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful. The Role and Impact As a GPU Design Verification Engineer, you will contribute to the development of next-generation graphics components, ensuring their functionality meets rigorous specifications. You will play a pivotal role in implementing verification strategies, debugging issues, and collaborating with cross-functional teams to deliver industry-leading Graphics IP solutions. Your work will drive innovation across integrated, discrete, and data center AI applications, shaping Intel's leadership in the GPU space. Business Group The Graphics IP team within Intel's Data Center Group (DCG) is dedicated to delivering cutting-edge GPU technologies that support high-performance computing and AI solutions. We focus on continuous innovation, designing scalable and reusable hardware solutions used by millions globally. By collaborating across Intel, we ensure our efforts align with the company's broader goals of advancing graphics and compute capabilities. Key Responsibilities - Define and execute scalable IP verification plans, test benches, and validation methodologies to meet graphics microarchitecture specifications. - Debug and resolve failing tests by identifying issues, performing root cause analysis, and implementing corrective measures in pre-silicon environments. - Execute system simulations and analyze power, timing, and functional coverage metrics. - Collaborate with architecture, design, and physical teams to optimize functional, performance, and power goals. - Independently develop verification environments and ensure functional coverage closure. - Create technical documentation, test plans, and drive reviews to ensure alignment with architectural objectives. - Maintain and enhance verification infrastructure and methodologies for graphics logic components. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. Minimum Qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field plus 4+ years of relevant experience, or Master's degree with 3+ years of relevant experience, or PhD with no prior professional experience in: - System Verilog and UVM for creating verification environments. - Developing feature verification test benches and achieving functional coverage closure. - Analytical and debugging skills in pre-silicon environments, including issue replication and resolution. - Scripting languages such as Python. Preferred Qualifications: - Knowledge of GPU architecture fundamentals and 3D graphics pipeline concepts. - Experience with industry-standard frontend design and verification tools and methodologies. - Exposure to memory subsystem protocols (e.g., CXL, AXI, PCIe). - Familiarity with assertion-based verification techniques. - Experience working with emulators or FPGA for p

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