Jobs / United States / Intel Corporation

Intel Corporation

Principal Engineer, SOC Performance Architecture

3 Locations Posted today

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Intel Corporation paid sponsored hires in similar roles11 certified filings for “SoC Design Engineer” (Architectural and Engineering Managers) in TX: $160k–$224k, median $192k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 1,731 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Intel Corporation paid sponsored hires in similar roles
11 certified filings for “SoC Design Engineer” (Architectural and Engineering Managers) in TX: $160k–$224k, median $192k. Most were filed at wage level II (36%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

Job Details: Job Description: The Role and Impact As a Principal Engineer in SoC Performance Architecture, you will be at the forefront of developing and driving the end-to-end architectural Power and Performance specifications for cutting-edge, modular, and scalable Datacenter Products that will power the next generation of computing. This role offers the unique opportunity to influence the technical direction of both Intel and the broader industry, ensuring our leadership in performance, power efficiency, and scalability. Your contributions will directly impact Intel's ability to deliver innovative solutions across diverse market segments, from high-performance computing to ultra-low power products. This is a pivotal position that combines technical strategy, architectural innovation, and leadership to shape the future of the Intel Datacenter organization. Key Responsibilities • Drive the development of SOC Architecture PnP specifications, including product viability of feature requirements through SOC and IP Modeling, and hardware-software interoperability throughout the product lifecycle. • Define and evaluate feasibility tradeoffs for performance, power, frequency, area, and features to meet Datacenter Product requirements across multiple segments. • Conceptualize, invent, and specify modeling of architectural and microarchitecture features that deliver optimized product requirements for varying use cases. • Develop and document new methodologies to support emerging use cases, improve existing ones, and extend Performance and Power predictive modeling impact. • Model SOC Performance and Power, analyze current bottlenecks, and explore novel approaches for future workloads. • Create tests, test plans, and testing infrastructure for new architectures and features, conduct simulations, and analyze test results using advanced statistical models and data predictions. • Provide experimental proof-of-concept solutions to propose design alternatives that meet constraints related to performance, power, area, and timing. • Collaborate with cross-functional teams including architects, design, verification, and validation engineers to execute project requirements seamlessly. • Deliver new microarchitecture modeling and resolve issues during feature implementation to improve product design and overcome challenges. • Influence and challenge cross-functional roadmaps while defining technology targets for future Datacenter products. • Mentor and develop technical leaders, foster community growth, and act as a change agent while exemplifying Intel values in every aspect of your work. We invite you to join Intel and play a critical role in shaping the future of technology while growing your career in a collaborative, innovative, and inspiring environment. Qualifications: Minimum Qualifications • Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field, and 12+ years of relevant experience; or Master's degree and 10+ years of relevant experience; or PhD and 8+ years of relevant experience. • 10+ years of experience in Performance architecture and microarchitecture, bottleneck analysis, and optimization for Server workloads. • 10+ years of experience in testing and simulation tools, advanced statistical modeling, and data-driven predictions. • 10+ years of experience delivering experimental proof-of-concept solutions and driving end-to-end execution of architectural designs. Preferred Qualifications • Track record of influencing technical strategy and leading cross-functional teams to achieve organizational goals. • 10+ years of experience mentoring and developing technical leaders and fostering innovation within a team or organization. • Exceptional communication skills and t

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