Jobs / United States / Hewlett Packard Enterprise Company

Hewlett Packard Enterprise Company

VLSI ASIC Logic Design Engineer

4 Locations Posted today

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Sponsorship verdict

Sponsorship possible

One solid signal, not two. Worth applying, and worth asking about sponsorship early.

  • Employer is on a government sponsor recordThe US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first.
  • The posting doesn’t mention sponsorshipSilence isn’t a refusal — ask the recruiter before investing much time.
  • No salary bar for this routeH-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area.
  • What Hewlett Packard Enterprise Company paid sponsored hires in similar roles5 certified filings for “VLSI Engineer III” (Electronics Engineers, Except Computer) in CA: $157k–$186k, median $186k.
  • Confirmed live todayWhen a source last listed this job as open.
Details and sources
Employer is on a government sponsor record
The US Department of Labor certified 486 H-1B/E-3 labor condition applications for this employer between Oct 2025 and Jun 2026 (latest Jun 2026) — the step every H-1B hire needs first. Source: LCA disclosure data (US Department of Labor (OFLC)).
No salary bar for this route
H-1B has no fixed salary bar: the employer must pay at least the prevailing wage for the role and area. Cap-subject employers enter a lottery weighted by wage level. Source: https://www.federalregister.gov/documents/2025/12/29/2025-23853/weighted-selection-process-for-registrants-and-petitioners-seeking-to-file-cap-subject-h-1b, rules effective 2026-02-27.
What Hewlett Packard Enterprise Company paid sponsored hires in similar roles
5 certified filings for “VLSI Engineer III” (Electronics Engineers, Except Computer) in CA: $157k–$186k, median $186k. Most were filed at wage level II (50%) — 2 lottery entries, ≈31% projected selection odds for cap-subject employers. Source: US Department of Labor LCA disclosure data (Oct 2025 – Jun 2026).

US H-1B: cap-subject employers enter a lottery weighted by wage level — Level I gets 1 entry, Level IV gets 4 (DHS projected selection odds ≈15% at Level I to ≈61% at Level IV). Universities and non-profit research employers are cap-exempt. The $100,000 fee for new petitions from abroad is currently blocked by a court order (appeal pending).

A verdict summarises public evidence. It is not legal advice and never a guarantee: the employer and the immigration authority decide. Sign in to factor in where you can already work.

About the role

VLSI ASIC Logic Design Engineer    This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: Job Family Definition: Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed subject matter expertise to solve common and sometimes complex technical problems and recommending alternatives where necessary. Might act as project lead and provide assistance to lower level professionals. Exercises independent judgment and consults with others to determine best method for accomplishing work and achieving objectives. Responsibilities: • Participates as an independent member of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products. • VLSI / RTL design using System Verilog. • Create System Verilog Assertions (SVAs) and use Formal Verification to prove design correctness. • Write coverage to measure stimulus quality and perform coverage analysis to identify verification holes. • Create documentation collateral to communicate design intent which guides verification and firmware teams to utilize the design features. • Explore system latency and bandwidth trade-offs. Identify bottlenecks and propose solutions. • Collaborates and communicates with management and internal partners regarding design status, project progress, and issue resolution. • Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence. • Participates as an independent member of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products. Education and Experience Required: • Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent • 1-6 years of experience in VLSI design, verification, or implementation Knowledge and Skills: • Strong knowledge of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture • Strong analytical and problem-solving skills. • Strong experience in designing VLSI components, integrated circuitry, architectures and algorithms. • Strong knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA t

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